[iterate-4A] jit M0: recompiler seam + in-process differential harness

Foundation for a staged PPC block-recompiler (plan: closure-threaded ->
Cranelift -> block-linking). No codegen yet — proves the integration seam and
the correctness harness before any lowering exists.

New crates/xenia-cpu/src/recompiler.rs:
- run_block: executes a DecodedBlock; M0 falls back to the interpreter's
  execute() for every opcode, so it is bit-identical to step_block. Later
  stages dispatch lowered ops here and fall back only for uncompiled opcodes.
- gates jit_enabled()/diff_enabled() (XENIA_JIT / XENIA_JIT_DIFF, cached).
- In-process differential harness (diff_step): the interpreter is AUTHORITATIVE
  (drives real ctx+mem, so a JIT bug can never corrupt a run); the JIT runs
  SPECULATIVELY on a ctx clone against OverlayMemory (writes buffered in a byte
  HashMap, reads fall through to real pre-block memory), then registers are
  compared. Blocks touching MMIO or sync_sensitive (reservation/barrier) are
  skipped — a device callback can't be run twice and reservation state is
  shared cross-thread. report_diff_summary() prints checked/skipped/mismatch.

Why in-process: the guest is only COARSELY deterministic — coord_idle_advance
ticks vsync from wall-clock when idle, so two separate runs are not bit-exact
and a cross-run signature compare would measure jitter, not JIT divergence.

Supporting changes: PpcContext #[derive(Clone)] (harness clears the speculative
clone's reservation_table Arc); is_mmio() on the MemoryAccess trait (default
false) + GuestMemory impl via find_mmio; execute() made pub(crate); run_superblock
routes the block body (DIFF->diff_step, JIT->run_block, else step_block).

Validated: full boot+movie XENIA_JIT_DIFF=1 run = checked 218.4M blocks,
skipped(mmio/sync) 511.6K (0.23%), MISMATCHES=0 CLEAN; movie plays (ADVreads=30,
tid25 resumes); diff-mode ~2x slower (test-only path).

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>

crates/xenia-app/src/main.rs

@@ -3139,7 +3139,18 @@ fn run_superblock(
         let _prof_t0 = xenia_gpu::prof::is_on().then(std::time::Instant::now);
         let result = {
             let ctx = kernel.scheduler.ctx_mut_ref(thread_ref);
-            step_block(ctx, mem, block)
+            // JIT seam (M0). run_superblock's chain-loop + stop-conditions are
+            // unchanged; only the block body is routed:
+            //  - XENIA_JIT_DIFF: interpreter authoritative + JIT checked in-process,
+            //  - XENIA_JIT:      JIT authoritative (M0 = interpreter fallback),
+            //  - else:           interpreter directly.
+            if xenia_cpu::recompiler::diff_enabled() {
+                xenia_cpu::recompiler::diff_step(ctx, mem, block)
+            } else if xenia_cpu::recompiler::jit_enabled() {
+                xenia_cpu::recompiler::run_block(ctx, mem, block)
+            } else {
+                step_block(ctx, mem, block)
+            }
         };
         let executed = kernel
             .scheduler
@@ -4383,6 +4394,8 @@ fn dump_thread_diagnostic(
     if xenia_gpu::prof::enabled() {
         xenia_gpu::prof::report(0);
     }
+    // JIT differential harness: checked/skipped/mismatch tally at clean exit.
+    xenia_cpu::recompiler::report_diff_summary();
 
     // STEP-10 diagnostic (observe-only, env-gated `XENIA_DUMP_SLOTS=1`).
     // Prints each scheduler slot's full runqueue with the fields needed to