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xenia-cpu: VMX128, FPSCR, decoder split, scheduler, decode/block caches

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Split the monolithic interpreter into cohesive modules: dedicated
decoder (decoder.rs) producing 8-byte DecodedInstr; opcode tables
(opcode.rs); explicit traps (trap.rs); FPSCR helpers (fpscr.rs);
overflow/carry helpers (overflow.rs); a 4 KiB-page-versioned decode
cache and basic-block cache (block_cache.rs); and a full VMX/VMX128
implementation (vmx.rs) covering AltiVec + Xenon's 128-bit extensions.

Add the parallel-execution substrate behind --parallel: a 7-party
phaser (phaser.rs) for round-based barrier sync, ReservationTable
(reservation.rs) for guest LL/SC, and the per-HW-thread scheduler
core (scheduler.rs) that owns ThreadRefs, runqueues, and pending IRQs.

Disassembler is now the single source of truth: disasm.rs gains the
full base + extended + VMX128 mnemonic set, with golden JSON fixtures
and a disasm_goldens test suite. Add a criterion-style interpreter
bench. context.rs grows the per-thread state the new modules need
(reservation slot, FPSCR, vector regs).

Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
This commit is contained in:
MechaCat02
2026-05-01 16:27:43 +02:00
parent e9b2b57a44
commit c36cca14f9
20 changed files with 12284 additions and 458 deletions
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621
crates/xenia-cpu/tests/golden/extended_mnemonics.json Normal file
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{
"rows": [
{
"label": "nop",
"raw": "0x60000000",
"addr": "0x82000000",
"mnemonic": "ori",
"operands": "r0, r0, 0x0",
"ext_mnemonic": "nop",
"ext_operands": ""
},
{
"label": "li r3, 16",
"raw": "0x38600010",
"addr": "0x82000000",
"mnemonic": "addi",
"operands": "r3, r0, 16",
"ext_mnemonic": "li",
"ext_operands": "r3, 16"
},
{
"label": "li r3, -1",
"raw": "0x3860FFFF",
"addr": "0x82000000",
"mnemonic": "addi",
"operands": "r3, r0, -1",
"ext_mnemonic": "li",
"ext_operands": "r3, -1"
},
{
"label": "subi r3, r4, 16",
"raw": "0x3864FFF0",
"addr": "0x82000000",
"mnemonic": "addi",
"operands": "r3, r4, -16",
"ext_mnemonic": "subi",
"ext_operands": "r3, r4, 16"
},
{
"label": "lis r3, 0x1234",
"raw": "0x3C601234",
"addr": "0x82000000",
"mnemonic": "addis",
"operands": "r3, r0, 0x1234",
"ext_mnemonic": "lis",
"ext_operands": "r3, 0x1234"
},
{
"label": "subis r3, r4, 0xFFFF",
"raw": "0x3C64FFFF",
"addr": "0x82000000",
"mnemonic": "addis",
"operands": "r3, r4, 0xFFFF",
"ext_mnemonic": "subis",
"ext_operands": "r3, r4, 0x1"
},
{
"label": "mr r3, r4",
"raw": "0x7C832378",
"addr": "0x82000000",
"mnemonic": "or",
"operands": "r3, r4, r4",
"ext_mnemonic": "mr",
"ext_operands": "r3, r4"
},
{
"label": "mr. r3, r4",
"raw": "0x7C832379",
"addr": "0x82000000",
"mnemonic": "or.",
"operands": "r3, r4, r4",
"ext_mnemonic": "mr.",
"ext_operands": "r3, r4"
},
{
"label": "mr (via and)",
"raw": "0x7C832038",
"addr": "0x82000000",
"mnemonic": "and",
"operands": "r3, r4, r4",
"ext_mnemonic": "mr",
"ext_operands": "r3, r4"
},
{
"label": "not r3, r4",
"raw": "0x7C8320F8",
"addr": "0x82000000",
"mnemonic": "nor",
"operands": "r3, r4, r4",
"ext_mnemonic": "not",
"ext_operands": "r3, r4"
},
{
"label": "subf → sub r3, r5, r4",
"raw": "0x7C642850",
"addr": "0x82000000",
"mnemonic": "subf",
"operands": "r3, r4, r5",
"ext_mnemonic": "sub",
"ext_operands": "r3, r5, r4"
},
{
"label": "slwi r3, r4, 4",
"raw": "0x54832036",
"addr": "0x82000000",
"mnemonic": "rlwinm",
"operands": "r3, r4, 4, 0, 27",
"ext_mnemonic": "slwi",
"ext_operands": "r3, r4, 4"
},
{
"label": "srwi r3, r4, 4",
"raw": "0x5483E13E",
"addr": "0x82000000",
"mnemonic": "rlwinm",
"operands": "r3, r4, 28, 4, 31",
"ext_mnemonic": "srwi",
"ext_operands": "r3, r4, 4"
},
{
"label": "rotlwi r3, r4, 8",
"raw": "0x5483403E",
"addr": "0x82000000",
"mnemonic": "rlwinm",
"operands": "r3, r4, 8, 0, 31",
"ext_mnemonic": "rotlwi",
"ext_operands": "r3, r4, 8"
},
{
"label": "clrlwi r3, r4, 4",
"raw": "0x5483013E",
"addr": "0x82000000",
"mnemonic": "rlwinm",
"operands": "r3, r4, 0, 4, 31",
"ext_mnemonic": "clrlwi",
"ext_operands": "r3, r4, 4"
},
{
"label": "clrrwi r3, r4, 4",
"raw": "0x54830036",
"addr": "0x82000000",
"mnemonic": "rlwinm",
"operands": "r3, r4, 0, 0, 27",
"ext_mnemonic": "clrrwi",
"ext_operands": "r3, r4, 4"
},
{
"label": "extlwi r3, r4, 8, 8",
"raw": "0x5483400E",
"addr": "0x82000000",
"mnemonic": "rlwinm",
"operands": "r3, r4, 8, 0, 7",
"ext_mnemonic": "extlwi",
"ext_operands": "r3, r4, 8, 8"
},
{
"label": "slwi. r3, r4, 4",
"raw": "0x54832037",
"addr": "0x82000000",
"mnemonic": "rlwinm.",
"operands": "r3, r4, 4, 0, 27",
"ext_mnemonic": "slwi.",
"ext_operands": "r3, r4, 4"
},
{
"label": "rlwinm. r11,r11,0,31,31 (no simplify)",
"raw": "0x556B07FF",
"addr": "0x82000000",
"mnemonic": "rlwinm.",
"operands": "r11, r11, 0, 31, 31",
"ext_mnemonic": "clrlwi.",
"ext_operands": "r11, r11, 31"
},
{
"label": "clrldi r3, r4, 32",
"raw": "0x78830020",
"addr": "0x82000000",
"mnemonic": "rldicl",
"operands": "r3, r4, 0, 32",
"ext_mnemonic": "clrldi",
"ext_operands": "r3, r4, 32"
},
{
"label": "srdi r3, r4, 8",
"raw": "0x7883E200",
"addr": "0x82000000",
"mnemonic": "rldicl",
"operands": "r3, r4, 56, 8",
"ext_mnemonic": "srdi",
"ext_operands": "r3, r4, 8"
},
{
"label": "rotldi r3, r4, 8",
"raw": "0x78832000",
"addr": "0x82000000",
"mnemonic": "rldicl",
"operands": "r3, r4, 8, 0",
"ext_mnemonic": "rotldi",
"ext_operands": "r3, r4, 8"
},
{
"label": "cmpwi cr0, r3, 16",
"raw": "0x2C030010",
"addr": "0x82000000",
"mnemonic": "cmpi",
"operands": "0, r3, 16",
"ext_mnemonic": "cmpwi",
"ext_operands": "r3, 16"
},
{
"label": "cmpdi (L=1) variant",
"raw": "0x2C230010",
"addr": "0x82000000",
"mnemonic": "cmpi",
"operands": "1, r3, 16",
"ext_mnemonic": "cmpdi",
"ext_operands": "r3, 16"
},
{
"label": "blr",
"raw": "0x4E800020",
"addr": "0x82000000",
"mnemonic": "bclr",
"operands": "20, lt",
"ext_mnemonic": "blr",
"ext_operands": ""
},
{
"label": "blrl",
"raw": "0x4E800021",
"addr": "0x82000000",
"mnemonic": "bclrl",
"operands": "20, lt",
"ext_mnemonic": "blrl",
"ext_operands": ""
},
{
"label": "bctr",
"raw": "0x4E800420",
"addr": "0x82000000",
"mnemonic": "bcctr",
"operands": "20, lt",
"ext_mnemonic": "bctr",
"ext_operands": ""
},
{
"label": "bctrl",
"raw": "0x4E800421",
"addr": "0x82000000",
"mnemonic": "bcctrl",
"operands": "20, lt",
"ext_mnemonic": "bctrl",
"ext_operands": ""
},
{
"label": "beqlr (BO=12, BI=2 → cr0.eq true)",
"raw": "0x4D820020",
"addr": "0x82000000",
"mnemonic": "bclr",
"operands": "12, eq",
"ext_mnemonic": "beqlr",
"ext_operands": ""
},
{
"label": "bnelr",
"raw": "0x4C820020",
"addr": "0x82000000",
"mnemonic": "bclr",
"operands": "4, eq",
"ext_mnemonic": "bnelr",
"ext_operands": ""
},
{
"label": "bc → b 0x82000040",
"raw": "0x42800040",
"addr": "0x82000000",
"mnemonic": "bc",
"operands": "20, lt, 0x82000040",
"ext_mnemonic": "b",
"ext_operands": "0x82000040",
"branch_target": "0x82000040"
},
{
"label": "bc l → bl 0x82000040",
"raw": "0x42800041",
"addr": "0x82000000",
"mnemonic": "bcl",
"operands": "20, lt, 0x82000040",
"ext_mnemonic": "bl",
"ext_operands": "0x82000040",
"branch_target": "0x82000040"
},
{
"label": "bc 12,cr0.eq → beq 0x82000040",
"raw": "0x41820040",
"addr": "0x82000000",
"mnemonic": "bc",
"operands": "12, eq, 0x82000040",
"ext_mnemonic": "beq",
"ext_operands": "0x82000040",
"branch_target": "0x82000040"
},
{
"label": "bc 4,cr0.eq → bne 0x82000040",
"raw": "0x40820040",
"addr": "0x82000000",
"mnemonic": "bc",
"operands": "4, eq, 0x82000040",
"ext_mnemonic": "bne",
"ext_operands": "0x82000040",
"branch_target": "0x82000040"
},
{
"label": "bc 12,cr0.lt → blt 0x82000040",
"raw": "0x41800040",
"addr": "0x82000000",
"mnemonic": "bc",
"operands": "12, lt, 0x82000040",
"ext_mnemonic": "blt",
"ext_operands": "0x82000040",
"branch_target": "0x82000040"
},
{
"label": "bc 4,cr0.lt → bge 0x82000040",
"raw": "0x40800040",
"addr": "0x82000000",
"mnemonic": "bc",
"operands": "4, lt, 0x82000040",
"ext_mnemonic": "bge",
"ext_operands": "0x82000040",
"branch_target": "0x82000040"
},
{
"label": "bc 12,cr0.gt → bgt 0x82000040",
"raw": "0x41810040",
"addr": "0x82000000",
"mnemonic": "bc",
"operands": "12, gt, 0x82000040",
"ext_mnemonic": "bgt",
"ext_operands": "0x82000040",
"branch_target": "0x82000040"
},
{
"label": "bc 4,cr0.gt → ble 0x82000040",
"raw": "0x40810040",
"addr": "0x82000000",
"mnemonic": "bc",
"operands": "4, gt, 0x82000040",
"ext_mnemonic": "ble",
"ext_operands": "0x82000040",
"branch_target": "0x82000040"
},
{
"label": "bc 12, cr2.eq → beq cr2, 0x...040",
"raw": "0x418A0040",
"addr": "0x82000000",
"mnemonic": "bc",
"operands": "12, 4*cr2+eq, 0x82000040",
"ext_mnemonic": "beq",
"ext_operands": "cr2, 0x82000040",
"branch_target": "0x82000040"
},
{
"label": "bdnz 0x82000040",
"raw": "0x42000040",
"addr": "0x82000000",
"mnemonic": "bc",
"operands": "16, lt, 0x82000040",
"ext_mnemonic": "bdnzge",
"ext_operands": "0x82000040",
"branch_target": "0x82000040"
},
{
"label": "bdz 0x82000040",
"raw": "0x42400040",
"addr": "0x82000000",
"mnemonic": "bc",
"operands": "18, lt, 0x82000040",
"ext_mnemonic": "bdzge",
"ext_operands": "0x82000040",
"branch_target": "0x82000040"
},
{
"label": "b +0x40 → 0x82000040",
"raw": "0x48000040",
"addr": "0x82000000",
"mnemonic": "b",
"operands": "0x82000040",
"branch_target": "0x82000040"
},
{
"label": "bl +0x40 → 0x82000040",
"raw": "0x48000041",
"addr": "0x82000000",
"mnemonic": "bl",
"operands": "0x82000040",
"branch_target": "0x82000040"
},
{
"label": "ba 0x40 absolute",
"raw": "0x48000042",
"addr": "0x82000000",
"mnemonic": "ba",
"operands": "0x00000040",
"branch_target": "0x00000040"
},
{
"label": "bla 0x40 absolute",
"raw": "0x48000043",
"addr": "0x82000000",
"mnemonic": "bla",
"operands": "0x00000040",
"branch_target": "0x00000040"
},
{
"label": "tdeqi r3, 123",
"raw": "0x0883007B",
"addr": "0x82000000",
"mnemonic": "tdi",
"operands": "4, r3, 123",
"ext_mnemonic": "tdeqi",
"ext_operands": "r3, 123"
},
{
"label": "twlti r3, 123",
"raw": "0x0E03007B",
"addr": "0x82000000",
"mnemonic": "twi",
"operands": "16, r3, 123",
"ext_mnemonic": "twlti",
"ext_operands": "r3, 123"
},
{
"label": "mflr r3",
"raw": "0x7C6802A6",
"addr": "0x82000000",
"mnemonic": "mfspr",
"operands": "r3, LR",
"ext_mnemonic": "mflr",
"ext_operands": "r3"
},
{
"label": "mfctr r3",
"raw": "0x7C6902A6",
"addr": "0x82000000",
"mnemonic": "mfspr",
"operands": "r3, CTR",
"ext_mnemonic": "mfctr",
"ext_operands": "r3"
},
{
"label": "mfxer r3",
"raw": "0x7C6102A6",
"addr": "0x82000000",
"mnemonic": "mfspr",
"operands": "r3, XER",
"ext_mnemonic": "mfxer",
"ext_operands": "r3"
},
{
"label": "mtlr r3",
"raw": "0x7C6803A6",
"addr": "0x82000000",
"mnemonic": "mtspr",
"operands": "LR, r3",
"ext_mnemonic": "mtlr",
"ext_operands": "r3"
},
{
"label": "mtctr r3",
"raw": "0x7C6903A6",
"addr": "0x82000000",
"mnemonic": "mtspr",
"operands": "CTR, r3",
"ext_mnemonic": "mtctr",
"ext_operands": "r3"
},
{
"label": "mtxer r3",
"raw": "0x7C6103A6",
"addr": "0x82000000",
"mnemonic": "mtspr",
"operands": "XER, r3",
"ext_mnemonic": "mtxer",
"ext_operands": "r3"
},
{
"label": "crnot 4, 5",
"raw": "0x4C852842",
"addr": "0x82000000",
"mnemonic": "crnor",
"operands": "4*cr1+lt, 4*cr1+gt, 4*cr1+gt",
"ext_mnemonic": "crnot",
"ext_operands": "4*cr1+lt, 4*cr1+gt"
},
{
"label": "crclr 4",
"raw": "0x4C842182",
"addr": "0x82000000",
"mnemonic": "crxor",
"operands": "4*cr1+lt, 4*cr1+lt, 4*cr1+lt",
"ext_mnemonic": "crclr",
"ext_operands": "4*cr1+lt"
},
{
"label": "crset 4",
"raw": "0x4C842242",
"addr": "0x82000000",
"mnemonic": "creqv",
"operands": "4*cr1+lt, 4*cr1+lt, 4*cr1+lt",
"ext_mnemonic": "crset",
"ext_operands": "4*cr1+lt"
},
{
"label": "crmove 4, 5",
"raw": "0x4C852B82",
"addr": "0x82000000",
"mnemonic": "cror",
"operands": "4*cr1+lt, 4*cr1+gt, 4*cr1+gt",
"ext_mnemonic": "crmove",
"ext_operands": "4*cr1+lt, 4*cr1+gt"
},
{
"label": "lwsync",
"raw": "0x7C2004AC",
"addr": "0x82000000",
"mnemonic": "sync",
"operands": ""
},
{
"label": "trap",
"raw": "0x7FE00008",
"addr": "0x82000000",
"mnemonic": "tw",
"operands": "31, r0, r0",
"ext_mnemonic": "trap",
"ext_operands": ""
},
{
"label": "blr (BO=20, BI=4 — BI is don't-care)",
"raw": "0x4E840020",
"addr": "0x82000000",
"mnemonic": "bclr",
"operands": "20, 4*cr1+lt",
"ext_mnemonic": "blr",
"ext_operands": ""
},
{
"label": "blrl (BO=20, BI=7)",
"raw": "0x4E870021",
"addr": "0x82000000",
"mnemonic": "bclrl",
"operands": "20, 4*cr1+so",
"ext_mnemonic": "blrl",
"ext_operands": ""
},
{
"label": "bctr (BO=20, BI=4)",
"raw": "0x4E840420",
"addr": "0x82000000",
"mnemonic": "bcctr",
"operands": "20, 4*cr1+lt",
"ext_mnemonic": "bctr",
"ext_operands": ""
},
{
"label": "twllt r3, r4 (TO=2)",
"raw": "0x7C432008",
"addr": "0x82000000",
"mnemonic": "tw",
"operands": "2, r3, r4",
"ext_mnemonic": "twllt",
"ext_operands": "r3, r4"
},
{
"label": "twlgt r3, r4 (TO=1)",
"raw": "0x7C232008",
"addr": "0x82000000",
"mnemonic": "tw",
"operands": "1, r3, r4",
"ext_mnemonic": "twlgt",
"ext_operands": "r3, r4"
},
{
"label": "tdlge r3, r4 (TO=5)",
"raw": "0x7CA32088",
"addr": "0x82000000",
"mnemonic": "td",
"operands": "5, r3, r4",
"ext_mnemonic": "tdlge",
"ext_operands": "r3, r4"
},
{
"label": "twlle r3, r4 (TO=6)",
"raw": "0x7CC32008",
"addr": "0x82000000",
"mnemonic": "tw",
"operands": "6, r3, r4",
"ext_mnemonic": "twlle",
"ext_operands": "r3, r4"
},
{
"label": "twllti r3, 16",
"raw": "0x0C430010",
"addr": "0x82000000",
"mnemonic": "twi",
"operands": "2, r3, 16",
"ext_mnemonic": "twllti",
"ext_operands": "r3, 16"
},
{
"label": "tdlgei r3, 16",
"raw": "0x08A30010",
"addr": "0x82000000",
"mnemonic": "tdi",
"operands": "5, r3, 16",
"ext_mnemonic": "tdlgei",
"ext_operands": "r3, 16"
}
]
}