chore: add migration/ bundle for cross-machine setup
Bundles state that lives OUTSIDE the xenia-rs repo so a fresh clone on
another machine can be brought up to identical configuration via
migration/setup.sh:
- claude-memory/ ~/.claude/projects/-home-fabi-RE-Project-Sylpheed/memory/
(103 files, 1.1 MB - MEMORY.md + every
project_xenia_rs_*.md from audits
addis_signext through audit-058)
- project-root/dot-claude/ <project-root>/.claude/settings.json
(Stop hook + permissions)
- project-root/ppc-manual/ <project-root>/ppc-manual/
(PowerPC reference docs, 397 files, 3.7 MB)
- project-root/run-canary.sh <project-root>/run-canary.sh
- README.md Human-readable setup checklist
- setup.sh Idempotent installer (also reclones
xenia-canary at pinned HEAD 6de80dffe)
- MANIFEST.md Per-file mapping + per-file-not-bundled
restoration recipe
Excluded from bundle (not shippable via git):
- Sylpheed ISO (7.8 GB; copyright; manual copy required)
- sylpheed.db (395 MB; regenerable from XEX via analysis tooling)
- target/ build artifacts (rebuild on target)
- audit-runs probe firehoses (.log/.stdout/.stderr ~11 GB; rerun if needed)
- audit-runs memory dumps (.bin ~4.5 GB; rerun audit-026/027/029 if needed)
- xenia-canary checkout (setup.sh reclones from
git.mc02.dev/fabi/Xenia-Canary.git at HEAD 6de80dffe)
Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
This commit is contained in:
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migration/project-root/ppc-manual/alu/subfcx.md
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migration/project-root/ppc-manual/alu/subfcx.md
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# `subfcx` — Subtract From Carrying
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> **Category:** [Integer ALU](../categories/alu.md) · **Form:** [XO](../forms/XO.md) · **Opcode:** `0x7c000010`
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<!-- GENERATED: BEGIN -->
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## Assembler Mnemonics
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| Mnemonic | XML entry | Flags | Description |
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| --- | --- | --- | --- |
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| `subfc` | `subfcx` | — | Subtract From Carrying |
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| `subfco` | `subfcx` | OE=1 | Subtract From Carrying |
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| `subfc.` | `subfcx` | Rc=1 | Subtract From Carrying |
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| `subfco.` | `subfcx` | OE=1, Rc=1 | Subtract From Carrying |
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## Syntax
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```asm
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subfc[OE][Rc] [RD], [RA], [RB]
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```
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## Encoding
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### `subfcx` — form `XO`
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- **Opcode word:** `0x7c000010`
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- **Primary opcode (bits 0–5):** `31`
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- **Extended opcode:** `8`
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- **Synchronising:** no
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| Bits | Field | Meaning |
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| --- | --- | --- |
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| 0–5 | `OPCD` | primary opcode (31) |
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| 6–10 | `RT` | destination GPR |
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| 11–15 | `RA` | source A |
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| 16–20 | `RB` | source B |
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| 21 | `OE` | overflow-enable flag |
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| 22–30 | `XO` | extended opcode (9 bits) |
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| 31 | `Rc` | record-form flag |
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## Operands
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| Field | Role | Description |
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| --- | --- | --- |
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| `RA` | subfcx: read | Source GPR (`r0`–`r31`). |
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| `RB` | subfcx: read | Source GPR. |
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| `RD` | subfcx: write | Destination GPR. |
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| `CR` | subfcx: write (conditional) | Condition-register update. When `Rc=1`, CR field 0 (or CR6 for vector compares, CR1 for FPU) is updated from the result. |
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| `OE` | subfcx: write (conditional) | Overflow-enable bit. When 1, the instruction updates `XER[OV]` and stickies `XER[SO]` on signed overflow. |
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## Register Effects
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### `subfcx`
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- **Reads (always):** `RA`, `RB`
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- **Reads (conditional):** _none_
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- **Writes (always):** `RD`
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- **Writes (conditional):** `CR`, `OE`
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## Status-Register Effects
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- `subfcx`: **CR0** ← signed-compare(result, 0) with `SO ← XER[SO]`, when `Rc=1`.; **XER[OV]** ← signed-overflow(result); **XER[SO]** stickies, when `OE=1`.
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## Operation (pseudocode)
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```
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RT <- ~(RA) + (RB) + 1
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CA <- carry_out
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```
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## C Translation Example
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```c
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/* C translation: the xenia-rs interpreter arm below in */
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/* Implementation References is the authoritative semantic */
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/* snapshot. Translate it line-by-line: */
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/* - ctx.gpr[N] -> r[N] (or f[]/v[] for FPRs/VRs) */
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/* - mem.read_u*/write_u* -> mem_read_u*_be / mem_write_u*_be */
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/* - ctx.update_cr_signed(fld, v) -> update_cr_signed(fld, v) */
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/* - ctx.xer_ca / xer_ov / xer_so -> xer.CA / xer.OV / xer.SO */
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/* The Register Effects and Status-Register Effects tables above */
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/* enumerate every side effect a faithful translation must emit. */
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```
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## Implementation References
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**`subfcx`**
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- xenia-canary XML: [`tools/ppc-instructions.xml` — search for `mnem="subfcx"`](../../xenia-canary/tools/ppc-instructions.xml)
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- xenia-canary emit: [`src/xenia/cpu/ppc/ppc_emit_alu.cc:441`](../../xenia-canary/src/xenia/cpu/ppc/ppc_emit_alu.cc#L441)
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- xenia-rs opcode: [`crates/xenia-cpu/src/opcode.rs:83`](../../xenia-rs/crates/xenia-cpu/src/opcode.rs#L83)
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- xenia-rs decoder: [`crates/xenia-cpu/src/decoder.rs:859`](../../xenia-rs/crates/xenia-cpu/src/decoder.rs#L859)
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- xenia-rs interpreter: [`crates/xenia-cpu/src/interpreter.rs:270-287`](../../xenia-rs/crates/xenia-cpu/src/interpreter.rs#L270-L287)
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<details><summary>xenia-rs interpreter body (frozen snapshot)</summary>
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```rust
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PpcOpcode::subfcx => {
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// PPCBUG-007: 32-bit ABI. The `rb >= ra` u64 unsigned compare is
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// exactly the shape that broke addis. Defensive 32-bit truncation
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// is required for correct CA even after upstream cleanup.
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let ra32 = ctx.gpr[instr.ra()] as u32;
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let rb32 = ctx.gpr[instr.rb()] as u32;
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let result32 = rb32.wrapping_sub(ra32);
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ctx.xer_ca = if rb32 >= ra32 { 1 } else { 0 };
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ctx.gpr[instr.rd()] = result32 as u64;
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if instr.oe() {
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let true_diff = (rb32 as i32 as i128) - (ra32 as i32 as i128);
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overflow::apply(ctx, true_diff != (result32 as i32) as i128);
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}
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if instr.rc_bit() {
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ctx.update_cr_signed(0, result32 as i32 as i64);
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}
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ctx.pc += 4;
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}
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```
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</details>
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<!-- GENERATED: END -->
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## Special Cases & Edge Conditions
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- **`RT ← RB − RA` with `XER[CA]` set on no-borrow.** Same operand-order convention as [`subfx`](subfx.md): the *first* source is subtracted *from* the second.
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- **`XER[CA] = 1` means *no borrow occurred*** — i.e. `RB >= RA` as unsigned. PowerISA encodes this as the carry-out of `~RA + RB + 1`, not as a borrow flag. Xenia's `if rb >= ra` test ([`interpreter.rs:157`](../../xenia-rs/crates/xenia-cpu/src/interpreter.rs#L157)) is the correct boolean encoding.
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- **No trap on signed overflow.** `subfco` / `subfco.` set `XER[OV]` and sticky `XER[SO]`; xenia-rs leaves the `OE` arm unimplemented.
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- **64-bit CR update on Xenon, 32-bit in xenia-rs.** [`interpreter.rs:160`](../../xenia-rs/crates/xenia-cpu/src/interpreter.rs#L160) truncates with `as i32 as i64`. Spec demands a full 64-bit signed compare for `subfc.`.
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- **Seeds a multi-word subtract chain.** Use as the low-word op; continue with [`subfex`](subfex.md) for middle words and [`subfmex`](subfmex.md)/[`subfzex`](subfzex.md) for the high word.
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- **Operand aliasing fine.** `subfc r3, r3, r3` always yields `0` with `CA = 1`.
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## Related Instructions
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- [`subfx`](subfx.md) — same op without `XER[CA]`.
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- [`subfex`](subfex.md) — `~RA + RB + CA` (chain continuation).
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- [`subfmex`](subfmex.md), [`subfzex`](subfzex.md) — chain terminators.
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- [`subfic`](subficx.md) — D-form: `RT ← SIMM − RA` with `XER[CA]`.
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- [`addcx`](addcx.md) — dual: addition seed-of-chain.
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## IBM Reference
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- [AIX 7.3 — `subfc` (Subtract From Carrying)](https://www.ibm.com/docs/en/aix/7.3.0?topic=set-subfc-subtract-from-carrying-instruction)
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