Stage 1 of the iterate-3O resume plan: make the P7 translator actually
compile the splash's real VS/PS so real per-vertex POSITIONS render via the
host wgpu pipeline, instead of every draw falling to the interpreter (which
emits a placeholder triangle). Two coupled fixes, both faithful (Route A):
1. ucode/control_flow.rs (GPUBUG-103): clause-level predication was decoded
from payload bits 28/29, which fall inside the exec clause's `sequence_`/
`vc_hi_` fields, NOT the predicate flag. That stamped `predicated=true`
on plain `kExec` clauses, so the translator rejected EVERY splash VS as
`cf_cond`. Per canary ucode.h, clause predication is determined by the
*opcode* (only kCondExecPred* = 5/6/13/14 are predicate-register-gated;
their `condition_` is at word1 bit 9 = payload bit 41). kExec/kExecEnd
(1/2) run unconditionally; kCondExec (3/4) is bool-constant-gated (not
modeled). Diagnosed live in --ui: reject reason cf_cond on all 7 splash
shader pairs → after fix, predicated=false and CF passes.
2. translator.rs: with CF passing, the next reject was `scl_op_unsupported`
for scalar opcodes 4 (kMulsPrev2 / LIT emul) and 8 (kSgts), plus thin
vector coverage. Expanded vector_expr + scalar_expr to mirror the runtime
interpreter's op set (which mirrors canary AluVectorOpcode/AluScalarOpcode):
CND_EQ/GE/GT, TRUNC, MAX4, DST for vectors; the full SEQS/SGTS/SGES/SNES,
MULS_PREV2 (with the -FLT_MAX / non-finite / b<=0 guard), SUBS(_PREV),
EXP/LOG/RCP/RSQ/SQRT/SIN/COS, FRCS/TRUNCS/FLOORS for scalars. Side-effecting
ops (setp*/kills*/maxas*) still reject → interpreter fallback (honest).
Result (--ui, measured): xlated-pipelines 0→6, all draws served by the
translator (served_interp=0) — real VS/PS now run on the host GPU. The
splash is still not visibly correct because the captured guest vertex
windows read all-zero: the vertex-buffer base VA (~0x0adf_xxxx) is UNMAPPED
in guest memory (mem.translate()==None). That is a CPU/kernel memory-mapping
gap, not a GPU-render gap — the next stage.
Determinism: both files are in xenia-gpu core but the CF `predicated` field
only feeds the UI translator + a metric tag, never deterministic state.
Verified: `check -n50000000 --gpu-inline --stable-digest` matches the golden
byte-for-byte (exit 0); 679 tests green.
Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
The publisher splash (title idx0) rendered FLAT in ours while canary samples
a texture: ours never decoded the logo's textured pixel shader
(E59B2B3D, a `tfetch2D` sprite) even though our guest IM_LOADs the exact same
microcode canary does (verified byte-identical against the Wine oracle). The
shader was misparsed as flat. Three coupled bugs in the ucode decoder, all
off vs canary `gpu/ucode.h`:
1. CF opcode table was off-by-one (`control_flow.rs`): mapped opcode 0→Exec
and 1→Exit, but Xenos has 0=kNop, 1=kExec, 2=kExecEnd, 3..6/13..14 the
cond-exec variants, 7/8 loop, 9/10 call/return, 11 condjmp, 12 alloc,
15 mark-vs-fetch-done. So a real `kExec` clause was read as a terminal
`Exit`, truncating the CF block and dropping every instruction (incl. the
`tfetch`) after it. Added Nop/MarkVsFetchDone variants; parse now ends on
an END-bit exec clause.
2. exec/loop `address` is an absolute instruction-triple index from shader
dword 0, but indexed our post-CF `instructions` slice directly
(`ucode/mod.rs`). Rebase addresses by the CF triple count so `address*3`
lands on the right instruction.
3. Fetch instruction bitfields were wrong (`ucode/fetch.rs`): `const_index`
read from bit 5 (actually `src_reg`) instead of bit 20, and texture
`dimension` from dword1 instead of dword2 bit14. The logo's `tfetch ..,tf0`
was read as `tf1`, whose empty fetch-constant failed to decode → no
texture. Also the `sequence` fetch/ALU bit is bit[0] of each pair, not
bit[1] (`shader_metrics.rs`, `translator.rs`, `xenos_interp.wgsl`).
Result (--gpu-inline, deterministic 2x): the active PS's `tfetch_slots` now
resolves slot 0, the tf0 fetch-constant decodes (fmt K8888), and
`gpu.texture.decode` fires (137x at -n 50M; texture_cache_entries 0→1, the
only golden field that changed — all draw/swap counts unchanged). The same
fixes correct the WGSL uber-shader's fetch/CF walk for the threaded/--ui path.
Added a regression test that parses the real E59B2B3D microcode and asserts a
tfetch slot is found. Golden re-baselined (texture_cache_entries 0→1).
Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
