# `subfmex` — Subtract From Minus One Extended > **Category:** [Integer ALU](../categories/alu.md) · **Form:** [XO](../forms/XO.md) · **Opcode:** `0x7c0001d0` ## Assembler Mnemonics | Mnemonic | XML entry | Flags | Description | | --- | --- | --- | --- | | `subfme` | `subfmex` | — | Subtract From Minus One Extended | | `subfmeo` | `subfmex` | OE=1 | Subtract From Minus One Extended | | `subfme.` | `subfmex` | Rc=1 | Subtract From Minus One Extended | | `subfmeo.` | `subfmex` | OE=1, Rc=1 | Subtract From Minus One Extended | ## Syntax ```asm subfme[OE][Rc] [RD], [RA] ``` ## Encoding ### `subfmex` — form `XO` - **Opcode word:** `0x7c0001d0` - **Primary opcode (bits 0–5):** `31` - **Extended opcode:** `232` - **Synchronising:** no | Bits | Field | Meaning | | --- | --- | --- | | 0–5 | `OPCD` | primary opcode (31) | | 6–10 | `RT` | destination GPR | | 11–15 | `RA` | source A | | 16–20 | `RB` | source B | | 21 | `OE` | overflow-enable flag | | 22–30 | `XO` | extended opcode (9 bits) | | 31 | `Rc` | record-form flag | ## Operands | Field | Role | Description | | --- | --- | --- | | `RA` | subfmex: read | Source GPR (`r0`–`r31`). | | `CA` | subfmex: read; subfmex: write | XER[CA] carry bit. Read by add-with-carry/subtract-with-borrow instructions, written by carrying instructions. | | `RD` | subfmex: write | Destination GPR. | | `CR` | subfmex: write (conditional) | Condition-register update. When `Rc=1`, CR field 0 (or CR6 for vector compares, CR1 for FPU) is updated from the result. | | `OE` | subfmex: write (conditional) | Overflow-enable bit. When 1, the instruction updates `XER[OV]` and stickies `XER[SO]` on signed overflow. | ## Register Effects ### `subfmex` - **Reads (always):** `RA`, `CA` - **Reads (conditional):** _none_ - **Writes (always):** `RD`, `CA` - **Writes (conditional):** `CR`, `OE` ## Status-Register Effects - `subfmex`: **CR0** ← signed-compare(result, 0) with `SO ← XER[SO]`, when `Rc=1`.; **XER[OV]** ← signed-overflow(result); **XER[SO]** stickies, when `OE=1`.; **XER[CA]** ← carry-out of the add / borrow-in of the subtract (always). ## Operation (pseudocode) ``` ; Pseudocode derives directly from the xenia-rs interpreter ; arm (see Implementation References). Operation semantics: ; - Read source operands from the fields listed under Operands. ; - Apply the arithmetic / logical / memory action described ; in the Description field above. ; - Write results to the destination register(s); update any ; status bits enumerated under Status-Register Effects. ; Consult the IBM AIX reference link under IBM Reference for ; canonical PPC-style pseudocode where xenia's expression is ; terse. ``` ## C Translation Example ```c /* C translation: the xenia-rs interpreter arm below in */ /* Implementation References is the authoritative semantic */ /* snapshot. Translate it line-by-line: */ /* - ctx.gpr[N] -> r[N] (or f[]/v[] for FPRs/VRs) */ /* - mem.read_u*/write_u* -> mem_read_u*_be / mem_write_u*_be */ /* - ctx.update_cr_signed(fld, v) -> update_cr_signed(fld, v) */ /* - ctx.xer_ca / xer_ov / xer_so -> xer.CA / xer.OV / xer.SO */ /* The Register Effects and Status-Register Effects tables above */ /* enumerate every side effect a faithful translation must emit. */ ``` ## Implementation References **`subfmex`** - xenia-canary XML: [`tools/ppc-instructions.xml` — search for `mnem="subfmex"`](../../xenia-canary/tools/ppc-instructions.xml) - xenia-canary emit: [`src/xenia/cpu/ppc/ppc_emit_alu.cc:486`](../../xenia-canary/src/xenia/cpu/ppc/ppc_emit_alu.cc#L486) - xenia-rs opcode: [`crates/xenia-cpu/src/opcode.rs:83`](../../xenia-rs/crates/xenia-cpu/src/opcode.rs#L83) - xenia-rs decoder: [`crates/xenia-cpu/src/decoder.rs:871`](../../xenia-rs/crates/xenia-cpu/src/decoder.rs#L871) - xenia-rs interpreter: [`crates/xenia-cpu/src/interpreter.rs:325-341`](../../xenia-rs/crates/xenia-cpu/src/interpreter.rs#L325-L341)
xenia-rs interpreter body (frozen snapshot) ```rust PpcOpcode::subfmex => { // PPCBUG-019: also fixes the always-true CA edge — `!ra` on u64 // is non-zero when ra32==0xFFFFFFFF and ca==0, so CA was stuck at 1. let ra32 = ctx.gpr[instr.ra()] as u32; let ca = ctx.xer_ca as u32; let result32 = (!ra32).wrapping_add(ca).wrapping_sub(1); ctx.xer_ca = if (!ra32) != 0 || ca != 0 { 1 } else { 0 }; ctx.gpr[instr.rd()] = result32 as u64; if instr.oe() { let true_sum = -(ra32 as i32 as i128) - 2 + (ca as i128); overflow::apply(ctx, true_sum != (result32 as i32) as i128); } if instr.rc_bit() { ctx.update_cr_signed(0, result32 as i32 as i64); } ctx.pc += 4; } ```
## Special Cases & Edge Conditions - **`RT ← ~RA + (−1) + XER[CA]` ≡ `~RA − 1 + CA`.** Terminator for a multi-word subtract chain when the high "minuend" word is implicitly all-ones (e.g. when computing `~x` style negation across many words). - **`RB` field unused.** XO-form but only `RA` is read. - **Carry-out predicate.** `CA' = (~RA != 0) || (CA != 0)` ([`interpreter.rs:191`](../../xenia-rs/crates/xenia-cpu/src/interpreter.rs#L191)). Only when `RA == ~0` (all ones) AND `CA == 0` does `CA'` become 0 — every other case produces no borrow on this final word. - **`OE=1`** should set `XER[OV]` on signed overflow; xenia-rs ignores it. - **64-bit CR update on Xenon, 32-bit in xenia-rs.** [`interpreter.rs:194`](../../xenia-rs/crates/xenia-cpu/src/interpreter.rs#L194). - **`XER[CA]` must be initialised** (typically by a [`subfcx`](subfcx.md) or [`subfex`](subfex.md) earlier in the chain). - **Symmetric with [`addmex`](addmex.md)**, the add-side terminator. ## Related Instructions - [`subfzex`](subfzex.md) — terminate with `~RA + 0 + CA` instead. - [`subfex`](subfex.md) — middle-of-chain. - [`subfcx`](subfcx.md) — chain seed. - [`addmex`](addmex.md) — dual. ## IBM Reference - [AIX 7.3 — `subfme` (Subtract From Minus One Extended)](https://www.ibm.com/docs/en/aix/7.3.0?topic=set-subfme-subtract-from-minus-one-extended-instruction)