# `crnor` — Condition Register NOR > **Category:** [Control / CR / SPR](../categories/control.md) · **Form:** [XL](../forms/XL.md) · **Opcode:** `0x4c000042` ## Assembler Mnemonics | Mnemonic | XML entry | Flags | Description | | --- | --- | --- | --- | | `crnor` | `crnor` | — | Condition Register NOR | ## Syntax ```asm crnor [CRBD], [CRBA], [CRBB] ``` ## Encoding ### `crnor` — form `XL` - **Opcode word:** `0x4c000042` - **Primary opcode (bits 0–5):** `19` - **Extended opcode:** `33` - **Synchronising:** no | Bits | Field | Meaning | | --- | --- | --- | | 0–5 | `OPCD` | primary opcode (19) | | 6–10 | `BT/BO` | target / branch options | | 11–15 | `BA/BI` | source A / CR bit to test | | 16–20 | `BB` | source B | | 21–30 | `XO` | extended opcode (10 bits) | | 31 | `LK` | link flag | ## Operands | Field | Role | Description | | --- | --- | --- | | `CRBA` | crnor: read | CR source bit A (0–31). | | `CRBB` | crnor: read | CR source bit B (0–31). | | `CRBD` | crnor: write | CR destination bit (0–31). | ## Register Effects ### `crnor` - **Reads (always):** `CRBA`, `CRBB` - **Reads (conditional):** _none_ - **Writes (always):** `CRBD` - **Writes (conditional):** _none_ ## Status-Register Effects _No condition-register or status-register effects._ ## Operation (pseudocode) ``` ; Pseudocode derives directly from the xenia-rs interpreter ; arm (see Implementation References). Operation semantics: ; - Read source operands from the fields listed under Operands. ; - Apply the arithmetic / logical / memory action described ; in the Description field above. ; - Write results to the destination register(s); update any ; status bits enumerated under Status-Register Effects. ; Consult the IBM AIX reference link under IBM Reference for ; canonical PPC-style pseudocode where xenia's expression is ; terse. ``` ## C Translation Example ```c /* C translation: the xenia-rs interpreter arm below in */ /* Implementation References is the authoritative semantic */ /* snapshot. Translate it line-by-line: */ /* - ctx.gpr[N] -> r[N] (or f[]/v[] for FPRs/VRs) */ /* - mem.read_u*/write_u* -> mem_read_u*_be / mem_write_u*_be */ /* - ctx.update_cr_signed(fld, v) -> update_cr_signed(fld, v) */ /* - ctx.xer_ca / xer_ov / xer_so -> xer.CA / xer.OV / xer.SO */ /* The Register Effects and Status-Register Effects tables above */ /* enumerate every side effect a faithful translation must emit. */ ``` ## Implementation References **`crnor`** - xenia-canary XML: [`tools/ppc-instructions.xml` — search for `mnem="crnor"`](../../xenia-canary/tools/ppc-instructions.xml) - xenia-canary emit: [`src/xenia/cpu/ppc/ppc_emit_control.cc:388`](../../xenia-canary/src/xenia/cpu/ppc/ppc_emit_control.cc#L388) - xenia-rs opcode: [`crates/xenia-cpu/src/opcode.rs:17`](../../xenia-rs/crates/xenia-cpu/src/opcode.rs#L17) - xenia-rs decoder: [`crates/xenia-cpu/src/decoder.rs:712`](../../xenia-rs/crates/xenia-cpu/src/decoder.rs#L712) ## Special Cases & Edge Conditions - **Operation.** `CR[CRBD] ← ¬(CR[CRBA] OR CR[CRBB])`. Result is 1 only when both source bits are 0; otherwise 0. - **`crnot BT, BA` idiom.** With `BA == BB`, `crnor BT, BA, BA` ≡ `¬CR[BA]` — this is the canonical PowerPC **single-bit invert**, recognised by assemblers as the simplified mnemonic `crnot BT, BA`. - **Bit-level operands.** 5-bit absolute CR-bit indices (0..31). The three bits may live in any combination of the eight CR fields. - **Use case.** Branch on "neither A nor B"; or, with `crnot`, simply complement a CR bit before consuming it in a `bcx`. - **No `Rc` / `OE`.** Pure CR-bit dataflow; CR0/XER untouched. - **Not synchronising.** Reorderable. - **xenia status.** Decoded via the generic CR-logical handler. xenia-canary's `InstrEmit_crnor` emits a host OR followed by NOT. ## Related Instructions - [`cror`](cror.md), [`crorc`](crorc.md) — non-negated OR siblings. - [`crnand`](crnand.md) — negated AND (the De Morgan dual). - [`crand`](crand.md), [`crandc`](crandc.md) — AND family. - [`crxor`](crxor.md), [`creqv`](creqv.md) — XOR / XNOR. - [`mcrf`](mcrf.md) — bulk CR-field copy. - [`bcx`](../branch/bcx.md) — typical consumer of synthesised CR bits. ### Simplified Mnemonics | Simplified | Expansion | Effect | | --- | --- | --- | | `crnot BT, BA` | `crnor BT, BA, BA` | `CR[BT] ← ¬CR[BA]` (invert single bit) | ## IBM Reference - [AIX 7.3 — `crnor` (Condition Register NOR)](https://www.ibm.com/docs/en/aix/7.3.0?topic=set-crnor-condition-register-nor-instruction) - [AIX 7.3 — Condition register simplified mnemonics](https://www.ibm.com/docs/en/aix/7.3.0?topic=mnemonics-condition-register-logical-simplified)