diff --git a/src/xenia/cpu/backend/x64/x64_emitter.cc b/src/xenia/cpu/backend/x64/x64_emitter.cc index 5da8f6adc..25181b36d 100644 --- a/src/xenia/cpu/backend/x64/x64_emitter.cc +++ b/src/xenia/cpu/backend/x64/x64_emitter.cc @@ -438,6 +438,19 @@ uint64_t TrapDebugBreak(void* raw_context, uint64_t address) { return 0; } +// AUDIT-030: log LR + r3..r6 when `log_lr_on_pc` PC is reached. +uint64_t TrapLogLR(void* raw_context, uint64_t address) { + auto* ctx = reinterpret_cast(raw_context); + XELOGI( + "TRACE-PC-LR pc={:08X} lr={:08X} r3={:08X} r4={:08X} r5={:08X} " + "r6={:08X} r31={:08X}", + static_cast(cvars::log_lr_on_pc), + static_cast(ctx->lr), static_cast(ctx->r[3]), + static_cast(ctx->r[4]), static_cast(ctx->r[5]), + static_cast(ctx->r[6]), static_cast(ctx->r[31])); + return 0; +} + void X64Emitter::Trap(uint16_t trap_type) { switch (trap_type) { case 20: @@ -454,6 +467,10 @@ void X64Emitter::Trap(uint16_t trap_type) { case 25: // ? break; + case 100: + // AUDIT-030: log LR + r3..r6 (set via --log_lr_on_pc). + CallNative(TrapLogLR, 0); + break; default: XELOGW("Unknown trap type {}", trap_type); db(0xCC); diff --git a/src/xenia/cpu/cpu_flags.cc b/src/xenia/cpu/cpu_flags.cc index 3ff067e15..d1f02f516 100644 --- a/src/xenia/cpu/cpu_flags.cc +++ b/src/xenia/cpu/cpu_flags.cc @@ -57,3 +57,8 @@ DEFINE_bool(break_condition_truncate, true, "truncate value to 32-bits", "CPU"); DEFINE_bool(break_on_debugbreak, true, "int3 on JITed __debugbreak requests.", "CPU"); + +// AUDIT-030: log LR + r3..r6 each time the given guest PC executes. +DEFINE_uint64(log_lr_on_pc, 0, + "Log LR + r3..r6 each time the given guest PC is executed.", + "CPU"); diff --git a/src/xenia/cpu/cpu_flags.h b/src/xenia/cpu/cpu_flags.h index 38c4f98ba..ad3d78581 100644 --- a/src/xenia/cpu/cpu_flags.h +++ b/src/xenia/cpu/cpu_flags.h @@ -35,4 +35,6 @@ DECLARE_bool(break_condition_truncate); DECLARE_bool(break_on_debugbreak); +DECLARE_uint64(log_lr_on_pc); + #endif // XENIA_CPU_CPU_FLAGS_H_ diff --git a/src/xenia/cpu/ppc/ppc_hir_builder.cc b/src/xenia/cpu/ppc/ppc_hir_builder.cc index 42d996cba..5db977ae7 100644 --- a/src/xenia/cpu/ppc/ppc_hir_builder.cc +++ b/src/xenia/cpu/ppc/ppc_hir_builder.cc @@ -174,6 +174,12 @@ bool PPCHIRBuilder::Emit(GuestFunction* function, uint32_t flags) { MaybeBreakOnInstruction(address); + // AUDIT-030: log LR + r3..r6 each time `log_lr_on_pc` is reached. + if (cvars::log_lr_on_pc != 0 && address == cvars::log_lr_on_pc) { + Comment("--log-lr-on-pc target"); + Trap(100); + } + InstrData i; i.address = address; i.code = code;