fe797556c2
Attacks the ACTUAL bottleneck the profile found (the ~40%-of-worker-time quiesce barrier — NOT lock contention, which was 4.8%). Removes the per-tick phaser rendezvous entirely: workers free-run continuously; the coordinator just takes the kernel lock each tick (like a 7th participant), runs the same housekeeping, releases, and unparks idle workers. The only reason the barrier existed was `dispatch_graphics_interrupts` borrowing a guest thread's ctx as the ISR victim — which races with a worker that has that ctx EXTRACTED for its unlocked region. Fixed with a per-slot in-flight flag: a worker sets its bit under the kernel lock right after mem::replace-ing its ctx out, clears it under the lock after writeback; the coordinator reads the flags (under the lock → stable snapshot) and passes an in_flight_mask to dispatch_graphics_interrupts, which SKIPS in-flight slots for victim selection. Lockstep + the barrier executor pass mask 0 (skip nothing → byte-identical). Measured (n=2B, JIT): typically ~17s = ~1.4× over lockstep-JIT (~24s), plays the full video (2.0B instrs, 12041 draws / 7440 swaps — the responsive coordinator delivers vsync faster so the guest advances more per instruction). Remaining run-to-run variance (occasional ~65s) is EXTERNAL — the box shows loadavg ~3 and a `powersave` governor with turbo off; it survived every code change (barrier, mmio, sync, tick, barrier-removal) precisely because it isn't the code. Validation: parallel_stress_short 20/20 ok under FREERUN=1; lockstep golden byte-identical (interp + JIT). Opt-in XENIA_PARALLEL_FREERUN=1. Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>