64e8ecbfd0
PPCBUG-565: Add vx128_5_sh() to decoder.rs — 4-bit shift at PPC bits 22-25 (host bits 6-9). The correct MSB is at PPC bit 22 (host bit 9). PPCBUG-361: vsldoi128 was reading the SH MSB from host bit 4 (PPC bit 27, reserved) instead of host bit 9 (PPC bit 22). All shift amounts >= 8 decoded incorrectly (e.g. shift=8 executed as shift=0). Replace the inline bit-shuffle with instr.vx128_5_sh(). Also fix vx128_p_perm_assembles_correctly test: replace nonexistent DecodedInstr::from_raw() calls with struct literal construction. Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>