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Phase 6 batch 2 — XER TBC enabling + load/store-multiple cleanups. - PPCBUG-123/124/161/566 (coupled): XER TBC field was unmodelled — `ctx.xer()` always returned 0 in bits 0-6, and `ctx.set_xer()` silently discarded any TBC writes. Result: `lswx` and `stswx` were permanent no-ops (the `while bytes_left > 0` loop never executed). Fix: add `pub xer_tbc: u8` to `PpcContext`; wire into `xer()` and `set_xer()`. Initialize to 0 in `PpcContext::new()`. lswx/stswx bodies are correct as-is once the infrastructure is wired. - PPCBUG-125 lmw: PowerISA marks `lmw rT, D(rA)` invalid when rA is in [rT..31]; canary skips the write to rA to preserve the EA base. Now matches canary. - PPCBUG-126/162 lswi/stswi: replaced `instr.rb()` with `instr.nb()` for the NB field. Both accessors return identical values today (bits 16-20), but the maintenance hazard from the misnomer is now removed. A future `rb()` type-system refactor would have broken lswi/stswi silently. Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com>