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MechaCat02 ef93a4fa14 handoff: VSync/event-wedge fixes + iterate 2.A–2.BC research notes

Source changes (dormant parity infra, retained from iterate 2.AI/2.AO):
- xenia-kernel/exports.rs: nt_create_event manual_reset polarity +
  related event wiring
- xenia-gpu/mmio_region.rs: D1MODE_VBLANK_VLINE_STATUS hardcode parity

Also lands the audit-runs/ analysis notes (.md/.txt/.json digests) for the
iterate 2.x VSync/0x10e8/0x1004 wedge investigation. Raw trace dumps
(.jsonl/.gz/.csv/.stdout) and agent worktrees (.claude/) are gitignored as
regenerable local artifacts — see memory + HANDOFF for the running findings.

Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>

2026-06-05 07:19:08 +02:00

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Phase C+23 — Cold-vs-cold verification

Date: 2026-05-26 Mode: Engine modified (vd_query_video_flags constant return). Cold-vs-cold protocol: fresh xrs-c23 cold runs vs archived canary jitter set.

Methodology

ours-cold jsonls: /tmp/ours-c23-vd-cold-{1,2,3}.jsonl (28.7 MB each, 108,507 events on tid=1). Captured under XENIA_CACHE_WIPE=1 with the freshly built xrs-c23 binary (release, post-fix).
canary jitter set: 3 archived cold runs canary-jitter-{1,2,3}.jsonl (4.4 / 3.5 / 3.7 GB) from xenia-canary/build-cross/bin/Windows/Debug/. Same reference jitter set used in C+20, C+21, C+22, Phase D Stage 0..4.
tid map: --tid-map 6=1 (canary main thread → ours main thread).

Pre-C+23 baseline (post-C+22)

matched=105,138 across all 3 jitters
first divergence: kernel.return VdQueryVideoFlags
                  canary=3 ours=0
                  at idx 105,138 (tid=6→1)

Post-C+23 (3-jitter table)

jitter	matched	first divergence at	first-divergence kind / payload
1	105,286	105,286	`import.call VdGetCurrentDisplayGamma` (canary) vs `import.call KeAcquireSpinLockAtRaisedIrql` (ours)
2	105,286	105,286	(same)
3	105,286	105,286	(same)

Delta vs baseline: +148 events in main matched-prefix on all three jitters. The new first divergence (VdGetCurrentDisplayGamma vs KeAcquireSpinLockAtRaisedIrql) is genuine and identical across all three jitters.

Absorber counters (sanity)

jitter	floating_create (c/o)	floating_wait (c/o)
1	0 / 0	1 / 0
2	0 / 0	0 / 0
3	1 / 0	3 / 0

Within the expected scheduling-jitter window. Matched-prefix stable at 105,286 across all three.

Sister chains

No sister chain regressions: the diff report lists only the main tid=6 → tid=1 chain (no sister chains exercised in the new window). All previously matched sister chains (11, 32, 4, 41, 16) remain unaffected because they fire outside the 105,138–105,286 window.

Determinism (3 cold runs)

run	md5	matched-prefix vs jitter-1	ours_total
cold-1	`4e2e781ff0609f3a0a08f573dee4be4e`	105,286	108,507
cold-2	`b195d82a1b61e87d6f54a2ac2b3e091b`	105,286	108,507
cold-3	`e6b94d4dc151007c924b81bbc5c9faf5`	105,286	108,507

The byte-level md5 differs (host_ns/guest_cycle wall-time jitter, expected) but the logical semantic state — matched-prefix, ours_total, first-divergence index, divergent payloads — is bit-identical across all 3 runs.

New cold baseline digest (representative cold-1): 4e2e781ff0609f3a0a08f573dee4be4e.

Phase B `image_canonical_sha256`

Pinned hash ea8d160e… UNCHANGED. No XEX loader changes; only kernel export logic modified.

Test suite

xenia-kernel: 226 PASS (was 224 + 2 new).

Conclusion

Phase C+23 advances main matched-prefix from 105,138 → 105,286 across all three canary jitter cold runs (+148 events, +0.0311% of canary total). The next divergence is a real post-VdSwap control-flow mismatch unrelated to video flags.

Engine MODIFIED (~50 LOC: 1 registration edit + 6 LOC function body + 40 LOC tests). Diff tool UNCHANGED. Phase B image_loaded_sha256 ε class boundary UNCHANGED.

Tripstones 1, 2, 3, 4, 5, 6 honored.

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