First real GPU implementation. Ring/PM4 frontend (ring_view,
ring_drain, pm4) drains the command processor; gpu_system owns the
threaded backend (DrainFence RPC + parker/fence helpers from M1) and
the MMIO-mapped register block (mmio_region).
Xenos shader frontend: ucode/{alu,control_flow,fetch,mod}.rs decode
the Xbox 360 microcode, translator.rs lowers it onto the WGSL
xenos_interp interpreter shader (shaders/xenos_interp.wgsl).
shader_metrics.rs counts decode/translate work.
Render state: draw_state, primitive, render_target_cache,
texture_cache, tiled_address (Xenos's swizzled tiled-memory layout),
xenos_constants (register field constants), edram (the 10 MiB EDRAM
model with MSAA), and resolve.rs (TILE_FLUSH copy-out — clear-resolve
plus bitwise-equivalent 32 bpp + 64 bpp paths landed). handle.rs
owns the typed GPU-resource handles the kernel hands out.
Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
22 lines
634 B
TOML
22 lines
634 B
TOML
[package]
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name = "xenia-gpu"
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version.workspace = true
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edition.workspace = true
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license.workspace = true
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[dependencies]
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xenia-types = { workspace = true }
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xenia-memory = { workspace = true }
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tracing = { workspace = true }
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thiserror = { workspace = true }
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anyhow = { workspace = true }
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byteorder = { workspace = true }
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metrics = { workspace = true }
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bytemuck = { workspace = true }
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crossbeam-channel = { workspace = true }
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[dev-dependencies]
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# Used to validate bundled WGSL placeholders compile cleanly. Matches the
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# wgpu-22 transitive dep so we don't pull in a second naga version.
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naga = { version = "22", features = ["wgsl-in"] }
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