CONSOLIDATION.md Phase 6. Both lived untracked in the project root -- on one
disk, backed up by nothing.
tools/ppc-manual/ 393 files, 3.7 MB. 455 instructions, 350 family pages,
598 mnemonics resolvable through index.json, plus the
generator that produced them.
tools/run-canary.sh the oracle launcher.
🔴 THE LAUNCHER WAS BROKEN IN TWO WAYS AND IS REWRITTEN, not copied:
* it pointed at `xenia-rs/sylpheed.iso`, a SYMLINK. Wine cannot resolve one
and says "path invalid", which reads as a corrupt image rather than a path
problem -- it has cost a session before. It now points at the real file and
warns if handed a symlink.
* it hardcoded one machine's absolute paths, and named `xenia-rs`, which this
consolidation retires. Now derived from the script's own location, with
SYLPH_CANARY_BIN / SYLPH_ISO overrides and a check that each exists.
The standing constraints are in its header where someone will read them: one
emulator at a time, Canary runs MUTED, and never judge a crash or a hang from
a Bash-launched run -- a SIGKILL that looked like the binary was the editor's
process supervisor.
⚠️ The manual's GENERATOR reads the xenia-rs source tree, which is going away.
Its decoder now lives here as crates/sylpheed-ppc, so the generator must be
repointed before it is run again. Recorded in the README rather than left for
someone to discover; the manual's content is checked in and regenerates from
nothing implicitly.
Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
34 lines
1.6 KiB
Markdown
34 lines
1.6 KiB
Markdown
# Form `XL` — XL — Extended, Link (branch-to-LR/CTR, CR logical)
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## Bit Layout
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| Bits | Field | Meaning |
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| --- | --- | --- |
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| 0–5 | `OPCD` | primary opcode (19) |
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| 6–10 | `BT/BO` | target / branch options |
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| 11–15 | `BA/BI` | source A / CR bit to test |
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| 16–20 | `BB` | source B |
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| 21–30 | `XO` | extended opcode (10 bits) |
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| 31 | `LK` | link flag |
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## Instructions Using This Form
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<!-- GENERATED: BEGIN -->
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| Mnemonic | Opcode | Group | Description |
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| --- | --- | --- | --- |
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| [`mcrf`](../control/mcrf.md) | `0x4c000000` | control | Move Condition Register Field |
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| [`bclrx`](../branch/bclrx.md) | `0x4c000020` | branch | Branch Conditional to Link Register |
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| [`crnor`](../control/crnor.md) | `0x4c000042` | control | Condition Register NOR |
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| [`crandc`](../control/crandc.md) | `0x4c000102` | control | Condition Register AND with Complement |
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| [`isync`](../alu/isync.md) | `0x4c00012c` | integer | Instruction Synchronize |
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| [`crxor`](../control/crxor.md) | `0x4c000182` | control | Condition Register XOR |
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| [`crnand`](../control/crnand.md) | `0x4c0001c2` | control | Condition Register NAND |
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| [`crand`](../control/crand.md) | `0x4c000202` | control | Condition Register AND |
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| [`creqv`](../control/creqv.md) | `0x4c000242` | control | Condition Register Equivalent |
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| [`crorc`](../control/crorc.md) | `0x4c000342` | control | Condition Register OR with Complement |
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| [`cror`](../control/cror.md) | `0x4c000382` | control | Condition Register OR |
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| [`bcctrx`](../branch/bcctrx.md) | `0x4c000420` | branch | Branch Conditional to Count Register |
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<!-- GENERATED: END -->
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