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docs(ppc-manual): quote Canary and our own decoder, not the retired xenia-rs

The generator had not been able to run correctly since the manual moved into
`tools/ppc-manual/`: it computed the repository root as `HERE.parent.parent`,
which now names `tools/`, so the XML, Canary's emitters and xenia-rs all stopped
resolving — silently, because both scrapers skipped what they could not find.
Every page's references had been pointing at paths that exist nowhere.

What each source contributed, measured on the 350 pages before this change:

  Operation (pseudocode)  251 pages: fixed boilerplate "derives from the xenia-rs
                          interpreter"; 99 carry real hand-written seeds
  C translation           337 pages: the same kind of boilerplate
  xenia-rs snapshot       336 pages: the interpreter arm, pasted in — the only
                          per-instruction semantics on unseeded pages
  links                   xenia-rs opcode/decoder/interpreter + Canary emitter

Now:

  * semantics come from **Xenia Canary**, the reference emulator, read through
    `git show` at a pinned upstream commit (`origin/canary_experimental`,
    f21ebd49e9). Not our checkout: it carries instrumentation and lacked
    upstream's `mcrf` fix, so it would have published probes and a wrong `mcrf`.
    Each page embeds the emitter (`InstrEmit_<mnem>`), and for the 128 pure
    one-line delegations also the helper that holds the semantics.
  * decode references point at `crates/sylpheed-ppc` — the decoder that
    produces `sylpheed.db` — as in-repo relative links.
  * the boilerplate now says what is true, and the C translation guide maps
    Canary's actual HIR calls, checked against `ppc_hir_builder.h` (including
    that `UpdateCR(n, v)` truncates to 32 bits).
  * `rust_scraper.py` -> `decoder_scraper.py` (interpreter half dropped);
    missing sources are now errors, not empty results.

Verified:

  consistency checks        455 XML entries, 350 families, 598 index keys
  hand-written tails        386/386 byte-identical after regeneration
  xenia-rs in generated     0
  pages with a snapshot     349/350 (was 336) — `dcbi` has no Canary emitter at all
  in-repo decoder links     910/910 resolve to a line holding the identifier
  emitter boundaries        brace counter == column-0 `}` rule on 521/521;
                            preprocessor model unit-tested (#if 0/#else/#elif)
  idempotency               re-run: 0 pages updated, 0 working-tree changes

Hand-written notes (outside the generated regions) are not rewritten here:

  * 110 links into `../../xenia-rs/...` were dead; they now point at the file in
    the archived repository (git.mc02.dev/fabi/xenia-rs @ 8401d4d). Line anchors
    were dropped because the notes predate that commit — 0 of 441 old line
    ranges match it — and a precise-looking wrong anchor is worse than none. The
    link text, which carries the author's line numbers, is unchanged.
  * 140 prose claims about xenia-rs's behaviour remain. 23 are verified to hold
    for Canary too (the 32-bit CR0 truncation, OE left unimplemented); the other
    114 need checking one by one, and some invert — e.g. `divdx` notes a correct
    64-bit CR0 update in xenia-rs where Canary's `UpdateCR` truncates. Left for
    a deliberate pass rather than a blind substitution.

Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>

2026-09-16 20:34:34 +02:00

5.2 KiB

Raw Blame History

`crorc` — Condition Register OR with Complement

Category: Control / CR / SPR · Form: XL · Opcode: 0x4c000342

Assembler Mnemonics

Mnemonic	XML entry	Flags	Description
`crorc`	`crorc`	—	Condition Register OR with Complement

Syntax

crorc [CRBD], [CRBA], [CRBB]

Encoding

`crorc` — form `XL`

Opcode word: 0x4c000342
Primary opcode (bits 0–5): 19
Extended opcode: 417
Synchronising: no

Bits	Field	Meaning
0–5	`OPCD`	primary opcode (19)
6–10	`BT/BO`	target / branch options
11–15	`BA/BI`	source A / CR bit to test
16–20	`BB`	source B
21–30	`XO`	extended opcode (10 bits)
31	`LK`	link flag

Operands

Field	Role	Description
`CRBA`	crorc: read	CR source bit A (0–31).
`CRBB`	crorc: read	CR source bit B (0–31).
`CRBD`	crorc: write	CR destination bit (0–31).

Register Effects

`crorc`

Reads (always): CRBA, CRBB
Reads (conditional): none
Writes (always): CRBD
Writes (conditional): none

Status-Register Effects

No condition-register or status-register effects.

Operation (pseudocode)

; No hand-written pseudocode for this instruction yet.
; The authoritative semantics are the Canary emitter snapshot under
; Implementation References; about half of Canary's emitters open
; with the PPC-style definition as a comment (`RD <- (RA) + (RB)`).
; Every side effect is also enumerated in the Register Effects and
; Status-Register Effects tables above.

C Translation Example

/* No hand-written C yet. Translate the Canary emitter snapshot   */
/* under Implementation References; its HIR maps directly:        */
/*   f.LoadGPR(n) / f.StoreGPR(n, v)  -> r[n] / r[n] = v          */
/*   f.LoadFPR / StoreFPR, f.LoadVR / StoreVR -> f[n], v[n]        */
/*   f.Load(ea, T), f.Store(ea, v) -> raw read / write; emitters   */
/*     wrap them in f.ByteSwap for the big-endian guest value      */
/*   f.UpdateCR(n, v)  -> CR field n from v's LOW 32 BITS vs 0     */
/*   f.LoadCA / f.StoreCA -> xer.CA;  f.StoreSAT -> vscr.SAT       */
/*   i.XO.RA, i.D.DS, ... -> the bit-fields listed under Operands  */
/* The Register Effects and Status-Register Effects tables above  */
/* enumerate every side effect a faithful translation must emit.  */

Implementation References

crorc

Canary XML: tools/ppc-instructions.xml — search for mnem="crorc"
Canary emitter: src/xenia/cpu/ppc/ppc_emit_control.cc:406
Sylpheed opcode: crates/sylpheed-ppc/src/opcode.rs:41
Sylpheed decoder: crates/sylpheed-ppc/src/decoder.rs:834

Canary emitter (frozen snapshot @ f21ebd49e9)

int InstrEmit_crorc(PPCHIRBuilder& f, const InstrData& i) {
  // CR[bt] <- CR[ba] | ¬CR[bb]   bt=bo, ba=bi, bb=bb
  Value* ba = f.LoadCRField(i.XL.BI >> 2, i.XL.BI & 3);
  Value* bb = f.LoadCRField(i.XL.BB >> 2, i.XL.BB & 3);
  Value* bt = f.Or(ba, f.And(f.Not(bb), f.LoadConstantInt8(0x01)));
  f.StoreCRField(i.XL.BO >> 2, i.XL.BO & 3, bt);
  return 0;
}

Special Cases & Edge Conditions

Operation. CR[CRBD] ← CR[CRBA] OR ¬CR[CRBB] — a one-instruction "A or not B" implication. Result is 0 only when A=0 and B=1.
Logical implication. B → A ≡ ¬B ∨ A, which is exactly crorc BT, BA, BB. Useful for predicates of the form "if B holds, then A must hold".
Identity case. crorc BT, BA, BA always yields 1 (A ∨ ¬A), an alternative to creqv for setting a bit.
Bit-level operands. 5-bit absolute CR-bit indices; sources and destination may all be in different CR fields.
Use case. Compose "if B then A" guards without a separate complement step.
No Rc / OE. Doesn't update CR0 or XER.
Not synchronising. Reorderable.
xenia status. Decoded by the generic CR-logical handler; canary emits OR-with-NOT directly.

cror, crnor — non-complement OR / NOR.
crand, crandc, crnand — AND family.
crxor, creqv — XOR / XNOR.
mcrf — bulk CR-field copy.
bcx — typical consumer.

crorc has no dedicated simplified mnemonic. See cror for crmove.

5.2 KiB Raw Blame History Unescape Escape

crorc — Condition Register OR with Complement

Assembler Mnemonics

Syntax

Encoding

crorc — form XL

Operands

Register Effects

crorc

Status-Register Effects

Operation (pseudocode)

C Translation Example

Implementation References

Special Cases & Edge Conditions

Related Instructions

IBM Reference

5.2 KiB

Raw Blame History

`crorc` — Condition Register OR with Complement

`crorc` — form `XL`

`crorc`