Sylpheed/tools/ppc-manual/alu/cmpli.md

cmpli — Compare Logical Immediate

Category: Integer ALU · Form: D · Opcode: 0x28000000

Assembler Mnemonics

Mnemonic	XML entry	Flags	Description
cmpli	cmpli	—	Compare Logical Immediate

Syntax

cmpli [CRFD], [L], [RA], [UIMM]

Encoding

cmpli — form D

• Opcode word: 0x28000000
• Primary opcode (bits 0–5): 10
• Extended opcode: —
• Synchronising: no

Bits	Field	Meaning
0–5	OPCD	primary opcode
6–10	RT	destination GPR (or RS when storing)
11–15	RA	source GPR (0 ⇒ literal 0 for RA0 forms)
16–31	D/SI/UI	16-bit signed or unsigned immediate

Operands

Field	Role	Description
L	cmpli: read	Operand-length bit for compare instructions (0 ⇒ 32-bit, 1 ⇒ 64-bit).
RA	cmpli: read	Source GPR (r0–r31).
UIMM	cmpli: read	16-bit unsigned immediate. Zero-extended.
CRFD	cmpli: write	CR destination field (crf, 0–7).

Register Effects

cmpli

• Reads (always): L, RA, UIMM
• Reads (conditional): none
• Writes (always): CRFD
• Writes (conditional): none

Status-Register Effects

No condition-register or status-register effects.

Operation (pseudocode)

if L = 0 then a,b <- (RA)[32:63], UIMM
else             a,b <- (RA), (0 || UIMM)
CR[BF] <- unsigned_compare(a, b) || XER[SO]

C Translation Example

/* No hand-written C yet. Translate the Canary emitter snapshot   */
/* under Implementation References; its HIR maps directly:        */
/*   f.LoadGPR(n) / f.StoreGPR(n, v)  -> r[n] / r[n] = v          */
/*   f.LoadFPR / StoreFPR, f.LoadVR / StoreVR -> f[n], v[n]        */
/*   f.Load(ea, T), f.Store(ea, v) -> raw read / write; emitters   */
/*     wrap them in f.ByteSwap for the big-endian guest value      */
/*   f.UpdateCR(n, v)  -> CR field n from v's LOW 32 BITS vs 0     */
/*   f.LoadCA / f.StoreCA -> xer.CA;  f.StoreSAT -> vscr.SAT       */
/*   i.XO.RA, i.D.DS, ... -> the bit-fields listed under Operands  */
/* The Register Effects and Status-Register Effects tables above  */
/* enumerate every side effect a faithful translation must emit.  */

Implementation References

cmpli

• Canary XML: tools/ppc-instructions.xml — search for mnem="cmpli"
• Canary emitter: src/xenia/cpu/ppc/ppc_emit_alu.cc:608
• Sylpheed opcode: crates/sylpheed-ppc/src/opcode.rs:30
• Sylpheed decoder: crates/sylpheed-ppc/src/decoder.rs:449

Canary emitter (frozen snapshot @ f21ebd49e9)

int InstrEmit_cmpli(PPCHIRBuilder& f, const InstrData& i) {
  // if L = 0 then
  //   a <- i32.0 || (RA)[32:63]
  // else
  //   a <- (RA)
  // if a <u i48.0 || SI then
  //   c <- 0b100
  // else if a >u i48.0 || SI then
  //   c <- 0b010
  // else
  //   c <- 0b001
  // CR[4×BF+32:4×BF+35] <- c || XER[SO]
  uint32_t BF = i.D.RT >> 2;
  uint32_t L = i.D.RT & 1;
  Value* lhs;
  Value* rhs;
  if (L) {
    lhs = f.LoadGPR(i.D.RA);
    rhs = f.LoadConstantUint64(i.D.DS);
  } else {
    lhs = f.Truncate(f.LoadGPR(i.D.RA), INT32_TYPE);
    rhs = f.LoadConstantUint32(i.D.DS);
  }
  f.UpdateCR(BF, lhs, rhs, false);
  return 0;
}

Special Cases & Edge Conditions

• Immediate is zero-extended. UIMM is a 16-bit value extended with zeros, so the comparable range is [0, 65535]. To compare against a value with high bits set, materialise it in a register with lis/ori and use cmpl.
• L bit selects width. L = 0 (cmplwi) zero-extends RA[32:63] to 64 bits and compares against the 16-bit immediate (also zero-extended). L = 1 (cmpldi) compares the full 64-bit RA against the immediate.
• Simplified mnemonics dominate. cmplwi cr0, RA, UIMM ≡ cmpli cr0, 0, RA, UIMM; the assembler injects the L bit automatically.
• No sign-extension surprises. Unlike cmpi, the immediate cannot be negative; cmpli always tests an unsigned magnitude.
• Common idiom: cmplwi rA, 0 to test a register for zero — slightly clearer in disassembly than cmpwi rA, 0 because it doesn't suggest signed semantics. Both produce the same EQ result for a zero argument.
• BF chooses one of 8 CR fields; same convention as cmp.

Related Instructions

• cmpl — register-register unsigned compare.
• cmpi — signed compare against a 16-bit immediate.
• cmp — register-register signed compare.
• cmplwi, cmpldi (simplified) — most common form seen in disassembly.

IBM Reference

• AIX 7.3 — cmpli (Compare Logical Immediate)
• AIX 7.3 — cmplwi / cmpldi (simplified mnemonics)