Files
Sylpheed/tools/ppc-manual/control/mftb.md
sim dedcf37867 docs(ppc-manual): quote Canary and our own decoder, not the retired xenia-rs
The generator had not been able to run correctly since the manual moved into
`tools/ppc-manual/`: it computed the repository root as `HERE.parent.parent`,
which now names `tools/`, so the XML, Canary's emitters and xenia-rs all stopped
resolving — silently, because both scrapers skipped what they could not find.
Every page's references had been pointing at paths that exist nowhere.

What each source contributed, measured on the 350 pages before this change:

  Operation (pseudocode)  251 pages: fixed boilerplate "derives from the xenia-rs
                          interpreter"; 99 carry real hand-written seeds
  C translation           337 pages: the same kind of boilerplate
  xenia-rs snapshot       336 pages: the interpreter arm, pasted in — the only
                          per-instruction semantics on unseeded pages
  links                   xenia-rs opcode/decoder/interpreter + Canary emitter

Now:

  * semantics come from **Xenia Canary**, the reference emulator, read through
    `git show` at a pinned upstream commit (`origin/canary_experimental`,
    f21ebd49e9). Not our checkout: it carries instrumentation and lacked
    upstream's `mcrf` fix, so it would have published probes and a wrong `mcrf`.
    Each page embeds the emitter (`InstrEmit_<mnem>`), and for the 128 pure
    one-line delegations also the helper that holds the semantics.
  * decode references point at `crates/sylpheed-ppc` — the decoder that
    produces `sylpheed.db` — as in-repo relative links.
  * the boilerplate now says what is true, and the C translation guide maps
    Canary's actual HIR calls, checked against `ppc_hir_builder.h` (including
    that `UpdateCR(n, v)` truncates to 32 bits).
  * `rust_scraper.py` -> `decoder_scraper.py` (interpreter half dropped);
    missing sources are now errors, not empty results.

Verified:

  consistency checks        455 XML entries, 350 families, 598 index keys
  hand-written tails        386/386 byte-identical after regeneration
  xenia-rs in generated     0
  pages with a snapshot     349/350 (was 336) — `dcbi` has no Canary emitter at all
  in-repo decoder links     910/910 resolve to a line holding the identifier
  emitter boundaries        brace counter == column-0 `}` rule on 521/521;
                            preprocessor model unit-tested (#if 0/#else/#elif)
  idempotency               re-run: 0 pages updated, 0 working-tree changes

Hand-written notes (outside the generated regions) are not rewritten here:

  * 110 links into `../../xenia-rs/...` were dead; they now point at the file in
    the archived repository (git.mc02.dev/fabi/xenia-rs @ 8401d4d). Line anchors
    were dropped because the notes predate that commit — 0 of 441 old line
    ranges match it — and a precise-looking wrong anchor is worse than none. The
    link text, which carries the author's line numbers, is unchanged.
  * 140 prose claims about xenia-rs's behaviour remain. 23 are verified to hold
    for Canary too (the 32-bit CR0 truncation, OE left unimplemented); the other
    114 need checking one by one, and some invert — e.g. `divdx` notes a correct
    64-bit CR0 update in xenia-rs where Canary's `UpdateCR` truncates. Left for
    a deliberate pass rather than a blind substitution.

Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
2026-09-16 20:34:34 +02:00

6.0 KiB
Raw Blame History

mftb — Move from Time Base

Category: Control / CR / SPR · Form: XFX · Opcode: 0x7c0002e6

Assembler Mnemonics

Mnemonic XML entry Flags Description
mftb mftb Move from Time Base

Syntax

mftb [RD], [TBR]

Encoding

mftb — form XFX

  • Opcode word: 0x7c0002e6
  • Primary opcode (bits 05): 31
  • Extended opcode: 371
  • Synchronising: no
Bits Field Meaning
05 OPCD primary opcode (31)
610 RT destination / source GPR
1120 spr/tbr/FXM SPR/TBR number (byte-swapped halves) or CR field mask
2130 XO extended opcode
31 reserved

Operands

Field Role Description
TBR mftb: read Time-Base Register selector for mftb.
RD mftb: write Destination GPR.

Register Effects

mftb

  • Reads (always): TBR
  • Reads (conditional): none
  • Writes (always): RD
  • Writes (conditional): none

Status-Register Effects

No condition-register or status-register effects.

Operation (pseudocode)

; No hand-written pseudocode for this instruction yet.
; The authoritative semantics are the Canary emitter snapshot under
; Implementation References; about half of Canary's emitters open
; with the PPC-style definition as a comment (`RD <- (RA) + (RB)`).
; Every side effect is also enumerated in the Register Effects and
; Status-Register Effects tables above.

C Translation Example

/* No hand-written C yet. Translate the Canary emitter snapshot   */
/* under Implementation References; its HIR maps directly:        */
/*   f.LoadGPR(n) / f.StoreGPR(n, v)  -> r[n] / r[n] = v          */
/*   f.LoadFPR / StoreFPR, f.LoadVR / StoreVR -> f[n], v[n]        */
/*   f.Load(ea, T), f.Store(ea, v) -> raw read / write; emitters   */
/*     wrap them in f.ByteSwap for the big-endian guest value      */
/*   f.UpdateCR(n, v)  -> CR field n from v's LOW 32 BITS vs 0     */
/*   f.LoadCA / f.StoreCA -> xer.CA;  f.StoreSAT -> vscr.SAT       */
/*   i.XO.RA, i.D.DS, ... -> the bit-fields listed under Operands  */
/* The Register Effects and Status-Register Effects tables above  */
/* enumerate every side effect a faithful translation must emit.  */

Implementation References

mftb

Canary emitter (frozen snapshot @ f21ebd49e9)
int InstrEmit_mftb(PPCHIRBuilder& f, const InstrData& i) {
  Value* time = f.LoadClock();
  const uint32_t n = ((i.XFX.spr & 0x1F) << 5) | ((i.XFX.spr >> 5) & 0x1F);
  if (n == 268) {
    // TB - full bits.
  } else {
    // TBU - upper bits only.
    time = f.Shr(time, 32);
  }
  f.StoreGPR(i.XFX.RT, time);
  return 0;
}

Special Cases & Edge Conditions

  • Time-base register selectors. The 10-bit tbr field encodes the same way as mfspr's spr field (two halves swapped). The two values defined for the Xenon:

    Decoded Name Meaning
    268 TBL Time Base, lower 32 bits
    269 TBU Time Base, upper 32 bits

    Other selectors return 0 in xenia and are not used by titles.

  • Atomic 64-bit read pattern. Because mftb reads only 32 bits at a time, software performs the canonical retry loop to avoid TBL→TBU rollover skew:

    retry:
        mftbu rH        ; read upper
        mftb  rL        ; read lower (TBR=268)
        mftbu rH2       ; read upper again
        cmpw  rH, rH2
        bne   retry
    
  • Xenon clock rate. Real hardware ticks the time base at ~3.2 GHz (one tick per CPU clock divided by the architectural ratio). The PVR signature the kernel exposes (0x00710800) and the kernel-reported tick rate jointly let titles convert TB ticks to seconds.

  • xenia behaviour. xenia-rs stores ctx.timebase as a u64 and increments it once per interpreted instruction, not per real-time wall clock. This guarantees deterministic replay (same trace ⇒ same TB readings) at the cost of decoupling guest time from host time. Games that rely on TB for real-time sync will run faster or slower depending on host throughput.

  • mftb RT (no operand) is the simplified mnemonic for mftb RT, 268 — read the lower half. mftbu RTmftb RT, 269.

  • Deprecated alternative. mfspr RT, 268/269 works on the Xenon (xenia accepts both) but post-PowerISA v2.06 deprecated reading TB through mfspr. Prefer mftb.

  • mfspr — generic SPR read; can also read TBL/TBU on Xenon (deprecated).
  • mtspr — TBL/TBU writes are privileged; not user-accessible.
  • isync — context-synchronising fence sometimes paired with mftb for tight measurement loops.

Simplified Mnemonics

Simplified Expansion Notes
mftb RT mftb RT, 268 read TBL
mftbu RT mftb RT, 269 read TBU

IBM Reference