Sylpheed/tools/ppc-manual/alu/subfx.md

subfx — Subtract From

Category: Integer ALU · Form: XO · Opcode: 0x7c000050

Assembler Mnemonics

Mnemonic	XML entry	Flags	Description
subf	subfx	—	Subtract From
subfo	subfx	OE=1	Subtract From
subf.	subfx	Rc=1	Subtract From
subfo.	subfx	OE=1, Rc=1	Subtract From

Syntax

subf[OE][Rc] [RD], [RA], [RB]

Encoding

subfx — form XO

• Opcode word: 0x7c000050
• Primary opcode (bits 0–5): 31
• Extended opcode: 40
• Synchronising: no

Bits	Field	Meaning
0–5	OPCD	primary opcode (31)
6–10	RT	destination GPR
11–15	RA	source A
16–20	RB	source B
21	OE	overflow-enable flag
22–30	XO	extended opcode (9 bits)
31	Rc	record-form flag

Operands

Field	Role	Description
RA	subfx: read	Source GPR (r0–r31).
RB	subfx: read	Source GPR.
RD	subfx: write	Destination GPR.
CR	subfx: write (conditional)	Condition-register update. When Rc=1, CR field 0 (or CR6 for vector compares, CR1 for FPU) is updated from the result.
OE	subfx: write (conditional)	Overflow-enable bit. When 1, the instruction updates XER[OV] and stickies XER[SO] on signed overflow.

Register Effects

subfx

• Reads (always): RA, RB
• Reads (conditional): none
• Writes (always): RD
• Writes (conditional): CR, OE

Status-Register Effects

• subfx: CR0 ← signed-compare(result, 0) with SO ← XER[SO], when Rc=1.; XER[OV] ← signed-overflow(result); XER[SO] stickies, when OE=1.

Operation (pseudocode)

RT <- ~(RA) + (RB) + 1       ; = (RB) − (RA)

C Translation Example

/* No hand-written C yet. Translate the Canary emitter snapshot   */
/* under Implementation References; its HIR maps directly:        */
/*   f.LoadGPR(n) / f.StoreGPR(n, v)  -> r[n] / r[n] = v          */
/*   f.LoadFPR / StoreFPR, f.LoadVR / StoreVR -> f[n], v[n]        */
/*   f.Load(ea, T), f.Store(ea, v) -> raw read / write; emitters   */
/*     wrap them in f.ByteSwap for the big-endian guest value      */
/*   f.UpdateCR(n, v)  -> CR field n from v's LOW 32 BITS vs 0     */
/*   f.LoadCA / f.StoreCA -> xer.CA;  f.StoreSAT -> vscr.SAT       */
/*   i.XO.RA, i.D.DS, ... -> the bit-fields listed under Operands  */
/* The Register Effects and Status-Register Effects tables above  */
/* enumerate every side effect a faithful translation must emit.  */

Implementation References

subfx

• Canary XML: tools/ppc-instructions.xml — search for mnem="subfx"
• Canary emitter: src/xenia/cpu/ppc/ppc_emit_alu.cc:427
• Sylpheed opcode: crates/sylpheed-ppc/src/opcode.rs:285
• Sylpheed decoder: crates/sylpheed-ppc/src/decoder.rs:978

Canary emitter (frozen snapshot @ f21ebd49e9)

int InstrEmit_subfx(PPCHIRBuilder& f, const InstrData& i) {
  // RT <- ¬(RA) + (RB) + 1
  Value* v = f.Sub(f.LoadGPR(i.XO.RB), f.LoadGPR(i.XO.RA));
  f.StoreGPR(i.XO.RT, v);
  if (i.XO.OE) {
    XEINSTRNOTIMPLEMENTED();
    // e.update_xer_with_overflow(EFLAGS??);
  }
  if (i.XO.Rc) {
    f.UpdateCR(0, v);
  }
  return 0;
}

Extended Pseudocode

RT <- ~(RA) + (RB) + 1                       ; = (RB) − (RA)
if OE then
    XER[OV] <- signed_overflow_of_subtract((RB), (RA), RT)
    XER[SO] <- XER[SO] | XER[OV]
if Rc then
    CR0[LT,GT,EQ] <- signed_compare(RT, 0)
    CR0[SO]      <- XER[SO]

Special Cases & Edge Conditions

• Operand order gotcha. subf RT, RA, RB computes RT ← RB − RA, not RA − RB. This reverses the intuitive ordering seen in x86/ARM. The assembler exposes a simplified mnemonic sub RT, RX, RY ≡ subf RT, RY, RX that restores the natural order — watch for both forms in disassembly.
• Implemented as add-with-complement. Hardware computes ~RA + RB + 1; Canary emits the equivalent RB − RA. All overflow/CR semantics are the same as addx with one operand complemented.
• No XER[CA] update — use subfcx if you need a borrow-out bit.
• No trap on overflow. subfo / subfo. only record the event in XER[OV] and sticky-set XER[SO].
• Signed-overflow predicate. OV = ((RA ^ RB) & (RB ^ RT)) >> 63 — set when operands have different signs and the result's sign differs from RB's.
• 64-bit CR update on Xenon (Canary truncates to 32 bits via f.UpdateCR(0, v); see the addx note).

Related Instructions

• subfcx — subtract-from producing XER[CA] (borrow-out).
• subfex — ~RA + RB + XER[CA] (subtract-with-borrow chain).
• subfmex, subfzex — subtract-from −1 / 0 with carry-in (propagates borrows).
• subfic — D-form: RT ← SIMM − RA with XER[CA].
• negx — specialises to 0 − RA.
• addx — inverse; shares overflow machinery.

IBM Reference

• AIX 7.3 — subf (Subtract From)
• AIX 7.3 — sub (simplified mnemonic)