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Test for vsr.

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gibbed
2015-06-09 19:31:44 -05:00
parent 04cdb3eb41
commit 114409ea2f
1 changed files with 7 additions and 0 deletions
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src/xenia/cpu/frontend/test/instr_vsr.s Normal file
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test_vsr_1:
#_ REGISTER_IN v3 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_IN v4 [04040404, 04040404, 04040404, 04040404]
vsr v3, v3, v4
blr
#_ REGISTER_OUT v3 [0FEFEFEF, EFEFEFEF, EFEFEFEF, EFEFEFEF]
#_ REGISTER_OUT v4 [04040404, 04040404, 04040404, 04040404]