[x64] Fix vector mask issue and add missing tests
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@@ -1111,6 +1111,7 @@ struct VECTOR_SHL_V128
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e.L(looper);
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e.movzx(e.ecx, e.word[e.rsp + stack_offset_src2 + e.rdx]);
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e.and_(e.cl, 0xF); // Mask shift count to 4 bits (0-15) for word shifts
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e.shl(e.word[e.rsp + stack_offset_src1 + e.rdx], e.cl);
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@@ -1205,6 +1206,7 @@ struct VECTOR_SHL_V128
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e.L(looper);
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e.mov(e.ecx, e.dword[e.rsp + stack_offset_src2 + e.rdx]);
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e.and_(e.cl, 0x1F); // Mask shift count to 5 bits (0-31) for dword shifts
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e.shl(e.dword[e.rsp + stack_offset_src1 + e.rdx], e.cl);
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@@ -1313,6 +1315,7 @@ struct VECTOR_SHR_V128
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// movzx is to eliminate any possible dep on previous value of rcx at start
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// of loop
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e.movzx(e.ecx, e.byte[e.rsp + stack_offset_src2 + e.rdx]);
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e.and_(e.cl, 7); // Mask shift count to 3 bits (0-7) for byte shifts
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// maybe using a memory operand as the left side isn't the best idea lol,
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// still better than callnativesafe though agners docs have no timing info
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// on shx [m], cl so shrug
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@@ -1392,7 +1395,7 @@ struct VECTOR_SHR_V128
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e.L(looper);
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e.movzx(e.ecx, e.word[e.rsp + stack_offset_src2 + e.rdx]);
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e.and_(e.cl, 0xF); // Mask shift count to 4 bits (0-15) for word shifts
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e.shr(e.word[e.rsp + stack_offset_src1 + e.rdx], e.cl);
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e.add(e.edx, 2);
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@@ -1492,6 +1495,7 @@ struct VECTOR_SHR_V128
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e.L(looper);
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e.mov(e.ecx, e.dword[e.rsp + stack_offset_src2 + e.rdx]);
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e.and_(e.cl, 0x1F); // Mask shift count to 5 bits (0-31) for dword shifts
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e.shr(e.dword[e.rsp + stack_offset_src1 + e.rdx], e.cl);
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e.add(e.edx, 4);
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@@ -1612,6 +1616,7 @@ struct VECTOR_SHA_V128
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// movzx is to eliminate any possible dep on previous value of rcx at start
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// of loop
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e.movzx(e.ecx, e.byte[e.rsp + stack_offset_src2 + e.rdx]);
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e.and_(e.cl, 7); // Mask shift count to 3 bits (0-7) for byte shifts
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// maybe using a memory operand as the left side isn't the best idea lol,
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// still better than callnativesafe though agners docs have no timing info
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// on shx [m], cl so shrug
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@@ -1691,7 +1696,7 @@ struct VECTOR_SHA_V128
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e.L(looper);
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e.movzx(e.ecx, e.word[e.rsp + stack_offset_src2 + e.rdx]);
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e.and_(e.cl, 0xF); // Mask shift count to 4 bits (0-15) for word shifts
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e.sar(e.word[e.rsp + stack_offset_src1 + e.rdx], e.cl);
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e.add(e.edx, 2);
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@@ -1775,6 +1780,7 @@ struct VECTOR_SHA_V128
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e.L(looper);
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e.mov(e.ecx, e.dword[e.rsp + stack_offset_src2 + e.rdx]);
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e.and_(e.cl, 0x1F); // Mask shift count to 5 bits (0-31) for dword shifts
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e.sar(e.dword[e.rsp + stack_offset_src1 + e.rdx], e.cl);
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e.add(e.edx, 4);
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