Directly check PEB for IsDebuggerAttached

Add constexpr getters to magicdiv class so it can be used from jitted x64/dxbc
Track the guest return address as well for guest/host sync, if multiple entries have the same guest stack find the first one with a matching guest retaddr. this fixes epic mickey 2 (which the previous guest-stack change had allowed to go ingame for a bit) and potentially also a crash in fable3.
Break if under debugger when stackpoints are overflowed

Add much more useful output for host exceptions, print out xenia_canary.exe relative offsets if exception is in module, formatmessage for ntstatus/win32err, strerror

Minor d3d12 microoptimization, instead of doing SetEventOnCompletion + WaitForSingleObject do SetEventOnCompletion w/ nullptr so that the wait happens in kernel mode, avoiding two extra context switches

add unimplemented kernel functions:
ExAllocatePoolWithTag
ObReferenceObject

ObDereferenceObject has no return value.
Log a message when ObDereferenceObject/Reference receive unregistered guest kernel objects
gave ObLookupThreadByThreadId its correct error status
hoist object_types initialization out of ObReferenceObjectByHandle
Fix out parameter values on error for a few kernel funcs
add note about msr to KeSetCurrentStackPointers
add X_STATUS_OBJECT_TYPE_MISMATCH check for xeNtSetEvent
add msr_mask field to X_KPCR
This commit is contained in:
chss95cs@gmail.com
2022-12-04 12:38:19 -08:00
parent 1eb61aa9ab
commit a63f424c0a
18 changed files with 412 additions and 105 deletions

View File

@@ -3124,7 +3124,6 @@ bool D3D12CommandProcessor::IssueCopy_ReadbackResolvePath() {
auto physaddr = memory_->TranslatePhysical(written_address);
memory::vastcpy(physaddr, (uint8_t*)readback_mapping,
written_length);
// XEDmaCpy(physaddr, readback_mapping, written_length);
D3D12_RANGE readback_write_range = {};
readback_buffer->Unmap(0, &readback_write_range);
}
@@ -3152,9 +3151,7 @@ void D3D12CommandProcessor::CheckSubmissionFence(uint64_t await_submission) {
direct_queue->Signal(queue_operations_since_submission_fence_,
fence_value) &&
SUCCEEDED(queue_operations_since_submission_fence_
->SetEventOnCompletion(fence_value,
fence_completion_event_)))) {
WaitForSingleObject(fence_completion_event_, INFINITE);
->SetEventOnCompletion(fence_value, nullptr)))) {
queue_operations_done_since_submission_signal_ = false;
} else {
XELOGE(
@@ -3170,9 +3167,8 @@ void D3D12CommandProcessor::CheckSubmissionFence(uint64_t await_submission) {
uint64_t submission_completed_before = submission_completed_;
submission_completed_ = submission_fence_->GetCompletedValue();
if (submission_completed_ < await_submission) {
if (SUCCEEDED(submission_fence_->SetEventOnCompletion(
await_submission, fence_completion_event_))) {
WaitForSingleObject(fence_completion_event_, INFINITE);
if (SUCCEEDED(submission_fence_->SetEventOnCompletion(await_submission,
nullptr))) {
submission_completed_ = submission_fence_->GetCompletedValue();
}
}

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@@ -43,6 +43,7 @@ DEFINE_bool(
"Allow stencil reference output usage on Direct3D 12 on Intel GPUs - not "
"working on UHD Graphics 630 as of March 2021 (driver 27.20.0100.8336).",
"GPU");
DEFINE_bool(no_discard_stencil_in_transfer_pipelines, false, "bleh", "GPU");
// TODO(Triang3l): Make ROV the default when it's optimized better (for
// instance, using static shader modifications to pass render target
// parameters).
@@ -2940,7 +2941,7 @@ D3D12RenderTargetCache::GetOrCreateTransferPipelines(TransferShaderKey key) {
// r0.xy = destination pixel XY index within the 32bpp tile
// r0.zw = 32bpp tile XY index
a.OpUDiv(dxbc::Dest::R(0, 0b1100), dxbc::Dest::R(0, 0b0011),
dxbc::Src::R(0, 0b01000100),
dxbc::Src::R(0, dxbc::Src::kXYXY),
dxbc::Src::LU(dest_tile_width_pixels, dest_tile_height_pixels,
dest_tile_width_pixels, dest_tile_height_pixels));
@@ -4189,12 +4190,14 @@ D3D12RenderTargetCache::GetOrCreateTransferPipelines(TransferShaderKey key) {
break;
case TransferOutput::kStencilBit:
// Discard the sample if the needed stencil bit is not set.
assert_true(cbuffer_index_stencil_mask != UINT32_MAX);
a.OpAnd(dxbc::Dest::R(0, 0b0001), dxbc::Src::R(1, dxbc::Src::kXXXX),
dxbc::Src::CB(cbuffer_index_stencil_mask,
kTransferCBVRegisterStencilMask, 0,
dxbc::Src::kXXXX));
a.OpDiscard(false, dxbc::Src::R(0, dxbc::Src::kXXXX));
if (!cvars::no_discard_stencil_in_transfer_pipelines) {
assert_true(cbuffer_index_stencil_mask != UINT32_MAX);
a.OpAnd(dxbc::Dest::R(0, 0b0001), dxbc::Src::R(1, dxbc::Src::kXXXX),
dxbc::Src::CB(cbuffer_index_stencil_mask,
kTransferCBVRegisterStencilMask, 0,
dxbc::Src::kXXXX));
a.OpDiscard(false, dxbc::Src::R(0, dxbc::Src::kXXXX));
}
break;
}
}

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@@ -1046,6 +1046,7 @@ struct Src : OperandAddress {
kYYYY = 0b01010101,
kZZZZ = 0b10101010,
kWWWW = 0b11111111,
kXYXY = 0b01000100
};
// Ignored for 0-component and 1-component operand types.