[CPU/PPC] Fix mfvscr/mtvscr instruction format

Correct mfvscr and mtvscr to use VX format instead of VX128_1.

These instructions operate on the standard Altivec VSCR register,
not VMX128 extended registers. The previous VX128_1 format was
incorrectly accessing the RB field instead of VD/VB.

src/xenia/cpu/ppc/ppc_emit_altivec.cc

@@ -301,19 +301,18 @@ int InstrEmit_stvrxl128(PPCHIRBuilder& f, const InstrData& i) {
 }
 
 int InstrEmit_mfvscr(PPCHIRBuilder& f, const InstrData& i) {
-  // is this the right format?
-
-  f.StoreVR(i.VX128_1.RB,
+  // mfvscr VD - Move from VSCR to VD
+  f.StoreVR(i.VX.VD,
             f.LoadContext(offsetof(PPCContext, vscr_vec), VEC128_TYPE));
   return 0;
 }
 
 int InstrEmit_mtvscr(PPCHIRBuilder& f, const InstrData& i) {
-  // is this the right format?
+  // mtvscr VB - Move from VB to VSCR
   // todo: what mtvscr does with the unused bits is implementation defined,
   // figure out what it does
 
-  Value* v = f.LoadVR(i.VX128_1.RB);
+  Value* v = f.LoadVR(i.VX.VB);
 
   Value* has_njm_value = f.Extract(v, (uint8_t)3, INT32_TYPE);