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GPU: Rewrite/rephrase some confusing shader translator code

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This commit is contained in:
DrChat
2017-08-07 21:08:01 -05:00
parent 6d9a56a269
commit cfc65a0197
2 changed files with 9 additions and 8 deletions
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15
src/xenia/gpu/shader_translator.cc
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@@ -257,14 +257,12 @@ void ShaderTranslator::GatherBindingInformation(
// Gather up color targets written to.
auto& op = *reinterpret_cast<const AluInstruction*>(ucode_dwords_ +
instr_offset * 3);
if (op.has_vector_op() && op.is_export()) {
if (op.vector_dest() <= 3) {
if (op.is_export()) {
if (op.has_vector_op() && op.vector_dest() <= 3) {
writes_color_targets_[op.vector_dest()] = true;
}
}
if (op.has_scalar_op() && op.is_export()) {
if (op.vector_dest() <= 3) {
writes_color_targets_[op.vector_dest()] = true;
if (op.has_scalar_op() && op.scalar_dest() <= 3) {
writes_color_targets_[op.scalar_dest()] = true;
}
}
}
@@ -1321,8 +1319,9 @@ void ShaderTranslator::ParseAluScalarInstruction(
uint32_t src3_swizzle = op.src_swizzle(3);
uint32_t swiz_a = ((src3_swizzle >> 6) + 3) & 0x3;
uint32_t swiz_b = ((src3_swizzle >> 0) + 0) & 0x3;
uint32_t reg2 = (static_cast<int>(op.scalar_opcode()) & 1) |
(src3_swizzle & 0x3C) | (op.src_is_temp(3) << 1);
uint32_t reg2 = (src3_swizzle & 0x3C) | (op.src_is_temp(3) << 1) |
(static_cast<int>(op.scalar_opcode()) & 1);
int const_slot = (op.src_is_temp(1) || op.src_is_temp(2)) ? 1 : 0;
ParseAluInstructionOperandSpecial(

2
src/xenia/gpu/spirv_shader_translator.cc
View File

@@ -243,6 +243,7 @@ void SpirvShaderTranslator::StartTranslation() {
attrib_type = is_signed ? vec2_int_type_ : vec2_uint_type_;
break;
}
// Intentionally fall through to float type.
case VertexFormat::k_16_16_FLOAT:
case VertexFormat::k_32_32_FLOAT:
attrib_type = vec2_float_type_;
@@ -260,6 +261,7 @@ void SpirvShaderTranslator::StartTranslation() {
attrib_type = is_signed ? vec4_int_type_ : vec4_uint_type_;
break;
}
// Intentionally fall through to float type.
case VertexFormat::k_16_16_16_16_FLOAT:
case VertexFormat::k_32_32_32_32_FLOAT:
attrib_type = vec4_float_type_;