Commit Graph

8401 Commits

Author SHA1 Message Date
Adrian
022a29fe58 [XAM] Fixed potential use-after-free on profile login 2026-03-21 22:11:35 +01:00
Herman S.
9a06a19eac [Testing] Parallel execution for ppc tests on posix
On posix run tests in parallel using a thread pool with fork-per-test
isolation (ported from edge).
On all platforms add progress output showing suite name and test count,
as well as elapsed time in the summary.
2026-03-21 23:49:32 +09:00
Herman S.
bc37068f90 [x64] Fix AVX-512 VECTOR_DENORMFLUSH merge-masking & FpRangeSign values
Copy src1 into dest before the masked vrangeps so that unmasked lanes
(normal/inf/NaN values) are preserved via merge-masking. Previously,
when the register allocator assigned different physical registers for
dest and src1, unmasked lanes would retain stale values from dest.

Tested with Intel SDE and AVX-512 cpu to verify.

Also shift unused FpRangeSign constants into bits [3:2] of the vrangeps
immediate, matching the Intel encoding. Only one used in the code was 0
so it was already correct by accident but using the others in the future
would produce incorrect results.
2026-03-21 15:16:59 +09:00
Herman S.
9621400ef6 [Testing] Add denormal input/output tests for VMX128 float instructions 2026-03-21 15:16:59 +09:00
Gliniak
1c529287a3 [Build] Revert of 3791149f34 2026-03-20 23:38:05 +01:00
Wunkolo
50ccad70b2 [Testing] Add 'VECTOR_DENORMFLUSH_F32' unit test
Unit tests the `OPCODE_VECTOR_DENORMFLUSH` implementation in isolation.
2026-03-20 22:26:17 +01:00
Wunkolo
7801d53842 [x64] Add AVX512 optimization for VECTOR_DENORMFLUSH
Use the `vptestnmd`-instruction to quickly test if the exponent bits of
each element is zero and put these results into a mask register. This
mask register can then be used to write `+0.0` or `-0.0` values
depending on the original value's sign-bit.

A masked `vrangeps` instruction is used to move zero-values into the effected
elements while preserving the sign-bit without having to touch memory.
2026-03-20 22:26:17 +01:00
Gliniak
3791149f34 [Build] Fixed incorrect destination for VS executable 2026-03-20 21:54:59 +01:00
Wunkolo
b1983bab68 [x64] Add GFNI optimization for single-byte vector splats
Use the `vgf2p8affineqb` instruction to splat byte-values across a whole
register without having to touch memory.
2026-03-20 21:34:35 +01:00
Gliniak
00001a4fb1 [Build] Fixed missing version.h in Visual Studio 2026-03-20 21:34:31 +01:00
Herman S.
207ea025f9 [3PP/Build/ARM64] Add missing asm/alignment macros to FFmpeg 2026-03-21 01:30:32 +09:00
Herman S.
3bf6823e5b [ARM64] Fix constexpr -> const for NEON vector types.
constexpr uint8x16_t isn't valid on all compilers since vcombine_u8/vcreate_u8
aren't constexpr
2026-03-21 01:30:32 +09:00
Herman S.
b04cc23670 [ARM64] Suppress tomlcpusplus compile warnings 2026-03-21 01:30:32 +09:00
Herman S.
fb6a67748f [ARM64] Add missing include 2026-03-21 01:30:32 +09:00
Herman S.
acb215696f [Memory] Handle host page sizes larger than 4KB in heap operations
Adds support for systems with host pages > 4KB (some Linux distros,
MacOS) where guest 4KB page operations can't map 1:1 to host mprotect calls.
No-op on windows and posix systems with 4KB page size.

Co-authored-by: Will Martin <wmarti@bu.edu>
2026-03-21 01:30:31 +09:00
Herman S.
86fd84870a [Testing] reset guest rounding mode before each test run
prevents a dirty FPU rounding mode from leaking between test cases
2026-03-21 01:30:31 +09:00
Herman S.
2713e85042 [Memory/x64] Add optional inline MMIO range checks for I32 loads/stores
When emit_inline_mmio_checks is enabled, the x64 backend emits
explicit address range checks (0x7FC00000–0x7FFFFFFF) before I32 memory
ops and routes hits through MMIOAwareLoad/Store directly, avoiding the
cost of trapping access violations for MMIO regions. The MMIO page
commit in AddVirtualMappedRange is skipped in this mode since accesses
are handled inline rather than via exception.
2026-03-21 01:30:31 +09:00
Herman S.
1e8f1837cf [Build] Use CMAKE_BINARY_DIR for output paths and version.h include
version.h is now found via CMAKE_BINARY_DIR on the include path instead
of a hardcoded "build/version.h" path. This allows out-of-tree and
multi-config builds to each generate and find their own version header
without colliding.
2026-03-21 01:30:31 +09:00
Herman S.
949d4c31fb [Testing] Add CPU backend tests 2026-03-21 01:30:31 +09:00
Wunkolo
c50b036178 [Build] Fix discord-rpc multi-arch builds
RapidJson needs to be configured to use NEON rather than SSE4.2
2026-03-19 07:52:11 +01:00
Gliniak
c651641c2d [UI] Fixed debug crash while closing post-processing menu 2026-03-18 22:21:22 +01:00
Margen67
aba2269c2b [xb] Skip unneeded submodules 2026-03-18 01:09:05 -07:00
Gliniak
057885a03d [XB] Check for generation of .slnx solution for VS 2026-03-17 21:17:56 +01:00
Margen67
8bfa15ca99 [xb] Use \n for print 2026-03-17 03:34:11 -07:00
Herman S.
65de2491b5 [Build] Include .pdb files with Release target 2026-03-17 14:25:58 +09:00
Herman S.
f32d52900e [Testing] Add some cpu backend tests 2026-03-17 13:55:38 +09:00
Herman S.
9fbcdae5dc [Base] Limit AVX startup checks to AMD64 2026-03-17 13:55:38 +09:00
Herman S.
b581c2d852 [D3D12] Adds scalar fallback for the SSE register-range check 2026-03-17 13:55:38 +09:00
Herman S.
b8912a4c79 [CPU/Backend] Refactor shared backend logic into CRTP base 2026-03-17 13:31:15 +09:00
Herman S.
b621e89c0b [Testing] Improve exception handling in the ppc test runner 2026-03-17 13:31:06 +09:00
Herman S.
f3a456d353 [Base/Debugging] Replaces x86 hack with arch agnostic Win32 API call 2026-03-17 13:30:56 +09:00
Herman S.
61639c8906 [Threading/Posix] Fix issue with nested suspend
When SuspendThread is called on an already-suspended thread, it would send
another pthread_kill signal, which would nest signal handlers and create
multiple outstanding sem_wait calls while Resume only posts once when count
reaches 0. Instead we increment suspend count and skip redundant signal.
2026-03-16 09:25:55 +09:00
Herman S.
7cd9aa21b3 [Testing] Add SetGuestRoundingMode and trampoline creation backend tests 2026-03-16 09:25:55 +09:00
Herman S.
ecae4b6a0b [Base/Mem] Add platform guard for AVX/SSE streaming stores in vastcpy.
Prevents build failures on non-x86 platforms
2026-03-16 09:24:59 +09:00
Herman S.
2a9b8de84b [Testing] Minor PPC testing updates
- add SIGTRAP handling
- remove per-test dots and print per suite instead
- refactor test loop from collecting all tests to iterating suites
- fix logging up output
2026-03-16 08:32:18 +09:00
Herman S.
56ac1c3f4b [CPU] Replace x86 SSE intrinsics with portable code in Value::Permute 2026-03-16 08:32:18 +09:00
Herman S.
5e636ac335 [x64] Implement missing byte-swap store/load paths
Fill in all unimplemented LOAD_STORE_BYTE_SWAP code paths in the x64
backend that previously hit assert_false or assert_always and add
tests
2026-03-16 02:52:26 +09:00
Herman S.
18fc1cd03c [Testing] add test coverage for SET_ROUNDING_MODE 2026-03-16 02:51:29 +09:00
Herman S.
9666ce1115 [Build] Remove stale xenia-hid-skylander references from CMakeLists
d37c22aa replaced skylander with the new portal HID library but
missed updating three CMakeLists.txt files. No replacement needed
since xenia-hid already links xenia-hid-portal transitively.
2026-03-15 17:46:57 +09:00
Herman S.
fdd583eced [GPU/WGF] Fix resolve_fast_32bpp_4xmsaa sample addressing
For 4xMSAA 32bpp, samples 2/3 add a +4 byte horizontal offset to the
EDRAM address. The old typed buffer code (Buffer<uint4>) implicitly
truncated this offset via integer division (>> 2), and the .yw swizzle
compensated by selecting odd elements within the aligned uint4 load.

After the ByteAddressBuffer conversion, Load4 uses the exact byte
address including the +4 offset, shifting the load window by one dword.
The .yw swizzle then picks samples from the wrong pixels, causing
visual artifacts like vertical streaks in Resident Evil 5.

Fix by aligning the load address down to 16 bytes and selecting the
swizzle based on whether the address was offset.
2026-03-15 17:24:16 +09:00
Herman S.
7f189f21fe [Testing] Update ppc testing harness to run multiple test names 2026-03-15 16:34:34 +09:00
Herman S.
932efd1e8a [Testing] Allocate a guest stack for the test ThreadState 2026-03-15 16:34:34 +09:00
Herman S.
c7f041ced0 [Base] Fix from_chars float parsing assertion on MSVC 2026-03-15 16:34:34 +09:00
Gliniak
dfd450fcbb [UI] Slightly improved performance of on screen notifications and achievements 2026-03-15 00:08:29 +01:00
Adrian
3f74dfef10 [XAM] Improved gamertag validation 2026-03-14 23:47:45 +01:00
Gliniak
8ccf01d151 [UI] Update gamertag input field only on change
No need to validate gamertag every frame
2026-03-14 23:25:09 +01:00
Gliniak
d37c22aad0 [HID] Redesigned support for Portals
- Added hotplug support on Windows
- Added support for XamInputNonControllerGetRawEx & XamInputNonControllerSetRawEx
2026-03-14 23:01:38 +01:00
Herman S.
3b8debcf5b [Memory] Fix watch race condition causing crashes on Linux
When two threads fault on the same watched page, the second thread may
find the watch already cleared by the first. TriggerCallbacks returned
false in this case, leaving the SIGSEGV unhandled. Return true instead
so the instruction retries — the page is already unprotected.

This is the signal-safe equivalent of the QueryProtect check that
handles the same race on Windows. Fixes a regression from dbd58b.
2026-03-12 15:32:07 +09:00
Gliniak
5f62db9289 [Kernel] Added kHighFrequency for RtlInitializeCriticalSectionAndSpinCount 2026-03-11 19:54:19 +01:00
Gliniak
10f66a47f6 Revert "place locals on backend pages"
This reverts commit fe7dc26e3f.

Reason:
- It gives no real performance impact, but introduces issues
2026-03-11 19:50:32 +01:00