Expands the vector register allocator from 20 to 28 registers by
including v8-v15. The HostToGuestThunk now saves/restores full Q8-Q15
(128-bit) instead of just D8-D15, and the GuestToHostThunk adds Q8-Q15
to its save/restore set since AAPCS64 only preserves their lower 64
bits across C calls.
Reduces register pressure for VMX-heavy guest code at the cost of
slightly larger thunk stack frames.
Reserves x19 to permanently hold the A64BackendContext pointer
(x20 - sizeof(A64BackendContext)), set once in the HostToGuestThunk.
Since x19 is AAPCS64 callee-saved, it survives all host calls for free.
Eliminates repeated 2-instruction mov+sub sequences in stackpoint
push/pop, stack synchronization, FPCR management, and reserved
load/store paths.
Reduces allocatable GPRs from 8 to 7 (like on x64).
Use the provided scratch register-index, defaults to W0/X0, and insert 64-bit elements directly into the vector-register rather than writing/reading to scratch memory.
Should allow certain splats to opportunistically emit the best assembly when possible.
Also use `std::bit_cast` rather than an inline `union` type to directly
cast a `float` into a `uint32_t`.
The `BRK` instruction code needs to be specified correctly so that a debugger can handle it properly(and continue from it). `brk 0xF000` implements a debug-breakpoint that can be continued from, and `brk 0xF001` is implemented an assertion failing. Any other codes like `0` and `F1` will not be able to be continued from or handled correctly by debuggers.
These seem to be standard brk codes:
```
Breakpoint 0xF000
Assert 0xF001
Debug Service 0xF002
Fastfail 0xF003
Divide by 0 0xF004
```
Rather than using a `mov` and vector-`dup` for vector-splats, just use the `movi` instruction where applicable(8-bit element-splats).
Eventually we might want to detect opportunities to use `FMOV` and the 64-bit form of `MOVI` over in `LoadV128Const`.
Track PPC scalar FP state in the backend context and restore it at
host/guest boundaries so translated FP code has a stable rounding mode.
Convert remaining VMX sequences to scoped EmitWithVmxFpcr. Remove
unnecessary ChangeFpcrMode from sequences that only call native helpers.
Co-Authored-By: Reality <reality@xenios.jp>
Save and restore FPCR around each VMX FP operation so vector code
doesn't leak FPCR state into scalar paths. Drop the DN bit so NaN
propagation fixup can inspect original payloads.
The A64 sequence table is populated by registration statics spread across
multiple translation units. Keeping the backing map as a global object makes
registration depend on cross-TU initialization order and can hit the table
before it has been constructed.
Move the sequence table behind a function-local static so sequence
registration is safe regardless of which unit initializes first.
Based entirely off existing xbyak x86 implementation and available
tests. Still needs a lot of optimization and testing on non-Windows
platforms.
So far passes all tests and boots at least some games on Windows.
Copy src1 into dest before the masked vrangeps so that unmasked lanes
(normal/inf/NaN values) are preserved via merge-masking. Previously,
when the register allocator assigned different physical registers for
dest and src1, unmasked lanes would retain stale values from dest.
Tested with Intel SDE and AVX-512 cpu to verify.
Also shift unused FpRangeSign constants into bits [3:2] of the vrangeps
immediate, matching the Intel encoding. Only one used in the code was 0
so it was already correct by accident but using the others in the future
would produce incorrect results.
Use the `vptestnmd`-instruction to quickly test if the exponent bits of
each element is zero and put these results into a mask register. This
mask register can then be used to write `+0.0` or `-0.0` values
depending on the original value's sign-bit.
A masked `vrangeps` instruction is used to move zero-values into the effected
elements while preserving the sign-bit without having to touch memory.
When emit_inline_mmio_checks is enabled, the x64 backend emits
explicit address range checks (0x7FC00000–0x7FFFFFFF) before I32 memory
ops and routes hits through MMIOAwareLoad/Store directly, avoiding the
cost of trapping access violations for MMIO regions. The MMIO page
commit in AddVirtualMappedRange is skipped in this mode since accesses
are handled inline rather than via exception.
Generate per-function CIE+FDE records and register them via
__register_frame so the C++ exception unwinder can propagate through
JIT frames. Replace setjmp/longjmp fiber reentry with throw/catch
on Linux to ensure destructors and RAII guards run during fiber
stack switches.
BaseHeap::Dispose() walks the page table and calls
DeallocFixed(addr, 0, kRelease) for every allocated page region.
These addresses are within file-backed view mappings (i.e. guest memory).
On Windows, VirtualFree on file-mapped pages silently returns FALSE.
On POSIX, the code hit assert_always() and crashed. Changed to return false
to match Windows behavior.
Memory leaks from munmap(addr, 0):
Callers passed length=0 to DeallocFixed(kRelease). On Windows this works because
VirtualFree(addr, 0, MEM_RELEASE) means "release the entire region" — Windows
ignores the length parameter for MEM_RELEASE and always frees the whole
allocation. On POSIX, munmap(addr, 0) fails with EINVAL, so the memory was
silently leaked every time.
Add round-to-nearest-even to the fast float16 pack path by folding a
0xFFF rounding bias into XMMF16PackLCPI0 and extracting bit 13 of the
source as the tie-breaker, matching the software fallback behavior.
Fix PACK_SHORT_2 test to use pre-biased float input (0x40400000 = 3.0)
as the hardware expects, rather than raw 0.0f which is out of range.
The loop conditions `n < 8 - n` and `n < 4 - n` terminated early,
only checking the first half of elements. This caused EmitInt16 and
EmitInt32 to incorrectly take the uniform shift path when trailing
elements had different shift amounts.
Resolves potential issues in SHL, SHR, and SHA.
Current implementation has an off by 1 in rounding, should
round up to even but doesn't. Need to figure out how to implement
it properly so just leaving the software version here for later
verification.
- For EmitInt8 there was missing check for & 7 which was causing graphical glitches in movies
- There is probably similar bug in 16/32 version, but that's for another commit
