Commit Graph

20 Commits

Author SHA1 Message Date
Herman S
32889f51be Use fetch_contant_word3 for exponent bias
Previously was using word4 which is LOD bias, fixes many graphic issues
with Vulkan backend
2025-12-06 22:26:40 +01:00
Herman S.
d430342d93 [Vulkan] Add resolution scaling support to Vulkan backend.
Largely similar to D3D12 implementation but more simple buffer
management and no mips scaling. Includes both FBO and FSI
rendering paths.

Tested on Linux with 2x2 and 3x3 running smoothly.
2025-10-14 19:08:06 +02:00
Margen67
4cb783bf22 Header cleanup 2025-07-19 14:42:21 -07:00
Xphalnos
47f327e848 [Misc] Replaced const with constexpr where possible 2025-04-08 19:32:17 +02:00
Xphalnos
5f918ef28d [Misc] Replaced const with constexpr where possible 2025-03-25 19:50:37 +01:00
Triang3l
8e7301f4d8 [SPIR-V] Use a helper class for most if/else branching
Simplifies emission of the blocks themselves (including inserting blocks
into the function's block list in the correct order), as well as phi after
the branching.

Also fixes 64bpp storing with blending in the fragment shader interlock
render backend implementation (had a typo that caused the high 32 bits to
overwrite the low ones).
2024-05-16 23:05:49 +03:00
Triang3l
8aaa6f1f7d [SPIR-V] Wrap 4-operand ops and 1-3-operand GLSL std calls 2023-04-19 21:44:24 +03:00
Triang3l
19d56001d2 [SPIR-V] Wrap NoContraction operations 2023-04-19 11:53:45 +03:00
Triang3l
78f1d55a36 [SPIR-V] Use Builder createSelectionMerge directly 2023-04-19 11:11:28 +03:00
Triang3l
887fda55c2 [SPIR-V] Remove temp reserve for 4 or less elements 2023-04-13 22:43:44 +03:00
Triang3l
45050b2380 [GPU] Vulkan fragment shader interlock RB and related fixes/cleanup
Also fixes addressing of MSAA samples 2 and 3 for 64bpp color render targets in the ROV RB implementation on Direct3D 12.
Additionally, with FSI/ROV, alpha test and alpha to coverage are done only if the render target 0 was dynamically written to (according to the Direct3D 9 rules for writing to color render targets, though not sure if they actually apply to the alpha tests on Direct3D 9, but for safety).
There is also some code cleanup for things spotted during the development of the feature.
2022-10-09 22:06:41 +03:00
Triang3l
ff7ef05063 [SPIR-V] Clamp cube face using NClamp, not NMax/FMin 2022-07-26 17:08:12 +03:00
Triang3l
b3edc56576 [Vulkan] Merge texture and sampler descriptors into a single descriptor set
Put all descriptors used by translated shaders in up to 4 descriptor sets, which is the minimum required, and the most common on Android, `maxBoundDescriptorSets` device limit value
2022-07-09 17:10:28 +03:00
Triang3l
5dca11a892 [SPIR-V] Fix fetch constant LOD bias signedness 2022-06-25 16:33:35 +03:00
Triang3l
1a22216e44 [SPIR-V] Texture fetch instructions 2022-06-09 21:42:16 +03:00
Triang3l
46202dd27a [Vulkan] Basic texture descriptor set allocation/binding 2022-05-17 22:42:28 +03:00
Triang3l
8ccb00d03d [SPIR-V] Store vfetch_full address in a variable 2022-02-07 23:00:23 +03:00
Triang3l
d926e37f95 [SPIR-V] vfetch: packed formats 2020-11-05 23:49:39 +03:00
Triang3l
45d3dc4806 [SPIR-V] vfetch: 16-bit float 2020-11-05 21:49:36 +03:00
Triang3l
a82b85a8ac [SPIR-V] vfetch: 32_* and 32_*_FLOAT formats 2020-11-04 23:56:12 +03:00