Commit Graph

191 Commits

Author SHA1 Message Date
Ben Vanik
40a6a12800 Attempting to inline a lot of MMIO operations. Works for GPU stuff mainly. 2015-06-02 20:15:43 -07:00
Ben Vanik
8244409501 Refactoring to enable future time scaling, coordinated clocks, etc. 2015-05-26 22:20:58 -07:00
gibbed
f2685dbb1d Fixed SPLAT_F32 for non-AVX2 branch. 2015-05-25 14:32:38 -05:00
gibbed
05081fa030 Fixed some constant loads. 2015-05-24 16:18:06 -05:00
Dr. Chat
f7a8dc3748 Change OPCODE_SPLAT instructions from SSE->AVX 2015-05-23 17:27:26 -05:00
Ben Vanik
c1a0f46ea8 Implementing dcbz. 2015-05-17 16:40:38 -07:00
Dr. Chat
5dbec09818 Change SSE opcodes back to AVX (mixing is bad) 2015-05-16 14:10:28 -05:00
Dr. Chat
65ff862495 Whoops (typo) 2015-05-16 13:41:33 -05:00
Dr. Chat
8e35ec0620 Rewrite FMA mul sub/add to avoid register shuffling
Also downgrade some AVX opcodes to SSE
2015-05-16 13:31:42 -05:00
Rick Gibbed
7546cca936 Merge pull request #207 from DrChat/mul_8_fix
Fix 8bit multiply instructions
2015-05-15 10:22:30 -05:00
Dr. Chat
dbdf3271fb Fix 8bit multiply instructions 2015-05-15 10:21:07 -05:00
Dr. Chat
a46b63558e Clean up mul sub/mul add code and fix a minor bug in mulsub f64 2015-05-15 10:09:19 -05:00
Ben Vanik
0d3e79ad2c Supporting const src1 mul_hi. 2015-05-13 00:19:07 -07:00
Ben Vanik
91c6ad8715 Fixing adde_constant. 2015-05-12 22:53:20 -07:00
Dr. Chat
82eecb752b Fix 8bit and 16bit mul instructions and clean up some code 2015-05-12 13:35:13 -05:00
gibbed
24b13b03f5 Fixing more cpu feature guards. 2015-05-12 00:26:45 -05:00
Ben Vanik
497e5a9f69 Fixing cpu feature guards. 2015-05-11 22:13:55 -07:00
Ben Vanik
ad7efa964f Adding --enable_haswell_instructions=false to disable modern instructions. 2015-05-11 21:42:10 -07:00
Ben Vanik
94c62b91d0 --trace_functions and --trace_function_coverage 2015-05-05 22:44:36 -07:00
Dr. Chat
2e9aec194f Ctrl+C Ctrl+V 2015-05-05 16:00:41 -05:00
Dr. Chat
26d8858684 Emulated vector shr 2015-05-05 15:58:51 -05:00
Dr. Chat
cb127ae9ba Emulate some vector arithmetic opcodes (until we get a native implementation) 2015-05-05 15:39:37 -05:00
Dr. Chat
cff09a4509 OPCODE_VECTOR_SHA and SPLAT_I16 for non-AVX2 CPUs 2015-05-05 14:35:37 -05:00
gibbed
3249f84700 It's vpblendw. 2015-05-05 13:58:21 -05:00
gibbed
6694461698 Fixed ecx restore in EmitShlXX/EmitShrXX/EmitShaXX. 2015-05-05 13:58:03 -05:00
Ben Vanik
743e01209b Update x64_sequences.cc 2015-05-05 10:23:04 -07:00
Dr. Chat
c3f1e74814 And actually use vpblendw 2015-05-05 12:16:38 -05:00
Dr. Chat
c1f9952cbd PERMUTE_I32 Alternative instructions 2015-05-05 12:16:31 -05:00
Dr. Chat
0e836f2eec Fix CNTLZ (I think)
SAR alt. instruction
2015-05-05 08:53:41 -05:00
Ben Vanik
78921c1a7e Merging Runtime into Processor. 2015-05-03 22:28:25 -07:00
Dr. Chat
b87b7472e0 Fix splat w/ F32 2015-05-02 09:32:21 -05:00
Dr. Chat
850e80396f Whoops (again) 2015-05-02 09:32:13 -05:00
Dr. Chat
7844dfa034 Corrected vec splat alt. instructions 2015-05-02 09:32:03 -05:00
Dr. Chat
b4025c889a whoops 2015-05-02 09:31:52 -05:00
Dr. Chat
c464584e89 CNTLZ alternative instructions 2015-05-02 09:31:43 -05:00
Dr. Chat
414e5b2d30 Replaced some AVX2 instructions with non-AVX2 instructions if unsupported by CPU 2015-05-02 09:31:31 -05:00
Ben Vanik
e3220f7ae6 Code cleanup: moving poly/ into xenia/base/ 2015-05-02 03:42:51 -07:00
Ben Vanik
99816056be Code cleanup: removing poly.h 2015-05-02 02:29:26 -07:00
Ben Vanik
d76998915a Code cleanup: moving poly logging to xenia 2015-05-02 01:59:50 -07:00
Ben Vanik
9281d62106 Moving cpu/runtime/ to cpu/. 2015-03-24 08:25:58 -07:00
Ben Vanik
29912f44c0 Moving alloy/ into xenia/cpu/ to start simplifying things. 2015-03-24 07:46:18 -07:00