Triang3l
|
7b93670dbd
|
[Vulkan] Remove old Vulkan code, change shaders directory, create empty Vulkan backend
|
2020-08-31 21:44:29 +03:00 |
|
Triang3l
|
1e9ee8f43b
|
[D3D12] Change most subsystem pointers to references
|
2020-08-30 22:07:35 +03:00 |
|
Triang3l
|
210c30aef9
|
[D3D12] Fix resolve not syncing with CPU memory and memory extent calculation
|
2020-08-28 23:49:23 +03:00 |
|
Triang3l
|
bd5f77bc3b
|
[GPU] Common resolve code based on compute shaders, swap MSAA samples 1 and 2, change ROV write rounding, random refactoring
|
2020-08-09 21:33:10 +03:00 |
|
Triang3l
|
b84239d507
|
[GPU] xenos.h: max texture size, interpolators
|
2020-07-11 18:56:56 +03:00 |
|
Triang3l
|
79413345af
|
[C++17] static constexpr variables are implicitly inline now
|
2020-07-11 16:44:57 +03:00 |
|
Triang3l
|
4bb0ca0e09
|
[GPU] Move all xenos.h to gpu::xenos, disambiguate Dimension/TextureDimension
|
2020-07-11 15:54:22 +03:00 |
|
Triang3l
|
713f26b5c8
|
[D3D12] Use typed buffers for texture untiling, calculate guest address once per thread
|
2020-07-03 20:03:53 +03:00 |
|
Triang3l
|
d26f84b36b
|
[D3D12] Untile whole mip tail to make alignment assumptions later, other mip fixes
|
2020-06-23 23:49:42 +03:00 |
|
Triang3l
|
40e335e2a9
|
[D3D12] Bindless textures/samplers
|
2020-06-19 23:52:33 +03:00 |
|
Triang3l
|
8a64861ec0
|
[DXBC] New tfetch: pre-swizzle signs, additive LOD + refactoring
|
2020-06-06 19:12:34 +03:00 |
|
Triang3l
|
b7a5c24bb1
|
[D3D12] d3d12_break_on_error + fix PerformSwap descriptor heap wrap
|
2020-05-17 00:26:04 +03:00 |
|
Triang3l
|
8341a48210
|
[D3D12] Fix state of textures bound to both VS and PS
|
2020-05-16 19:33:22 +03:00 |
|
Triang3l
|
fdd97fc831
|
[D3D12] Reword clamp FIXME because WONTFIX
|
2020-05-16 00:19:18 +03:00 |
|
Triang3l
|
a3b4c77fdb
|
[GPU] Add texture_util::SwizzleSigns for later
|
2020-05-11 16:30:09 +03:00 |
|
Triang3l
|
5795d25afe
|
[D3D12] Remove runtime check of cvars::d3d12_edram_rov
|
2020-04-12 20:48:35 +03:00 |
|
gibbed
|
ed04d96e67
|
Avoid using '#' format spec for X hex numbers.
Avoid using '#' format spec for X (uppercase) hex numbers, as it
results in output like "0XABCDEF" instead of "0xABCDEF".
|
2020-04-09 11:25:08 -05:00 |
|
gibbed
|
a48bb71c2f
|
Overhaul logging.
|
2020-04-07 16:09:41 -05:00 |
|
Triang3l
|
47eee5e1c3
|
[GPU] Unified function for mip level bounds, BaseMap mip filter, small refactoring
|
2020-02-18 23:31:48 +03:00 |
|
Triang3l
|
710d225d0a
|
[GPU] --gpu_allow_invalid_fetch_constants to bypass invalid fetch constant type errors
|
2020-02-16 19:35:26 +03:00 |
|
Triang3l
|
8ec813de82
|
[Memory, D3D12] Various refactoring from data provider development
|
2020-02-15 21:35:24 +03:00 |
|
Triang3l
|
00116fad2d
|
[D3D12] Don't assume there's a null D3D descriptor handle
|
2019-11-04 21:10:32 +03:00 |
|
Triang3l
|
9deb710607
|
[D3D12] CP: Framework for multiple command lists per frame
|
2019-10-31 23:33:11 +03:00 |
|
Triang3l
|
d3b6f71ae1
|
[D3D12] Don't use D3D12Context for command processor fence
|
2019-10-28 10:49:32 +03:00 |
|
Triang3l
|
b4af63fe31
|
[D3D12] Detach UploadBufferPool and DescriptorHeapPool from D3D12Context
|
2019-10-27 20:53:53 +03:00 |
|
Triang3l
|
b622e894d6
|
[D3D12] Replicate the last texture component into non-existent ones
|
2019-10-23 23:47:17 +03:00 |
|
Triang3l
|
1005651855
|
[D3D12] Fix DXN swizzle and cleanup texture swizzles
|
2019-10-21 21:16:29 +03:00 |
|
Triang3l
|
a9ed73bdd1
|
[GPU] Remove most hardcoded register/instruction layouts from common and D3D12 code
|
2019-10-20 19:40:37 +03:00 |
|
Triang3l
|
352f12f92e
|
[D3D12] Switch from gflags to cvars
|
2019-08-03 16:53:23 +03:00 |
|
Triang3l
|
90c9c24ca5
|
[D3D12] Add d3d12_readback_resolve gflag
|
2019-08-01 08:55:47 +03:00 |
|
Triang3l
|
4aceeb73c4
|
[Memory] Move new watches to heap-aware Memory from MMIOHandler
|
2019-07-30 08:00:20 +03:00 |
|
Triang3l
|
3f968c3760
|
[D3D12] YUV texture formats
|
2019-07-21 15:38:25 +03:00 |
|
Triang3l
|
08675ab65e
|
[D3D12] 3D texture resolve
|
2019-04-25 08:37:55 +03:00 |
|
Triang3l
|
3f22ff3645
|
[D3D12] DXT3A_AS_1_1_1_1 texture loading
|
2019-04-17 14:38:41 +03:00 |
|
Triang3l
|
6db0ad663b
|
[D3D12] mb_used -> used_mb in the profiler
|
2019-04-05 15:31:59 +03:00 |
|
Triang3l
|
d0c8725270
|
[D3D12] Limit texture memory usage with LRU deletion
|
2019-04-05 15:19:16 +03:00 |
|
Triang3l
|
5582e63ef1
|
[D3D12] Resolve 16-bit RTs to unorm textures, not snorm
|
2019-03-07 11:21:39 +03:00 |
|
Triang3l
|
7049d52dbb
|
[D3D12] Display texture cache size in the profiler
|
2019-03-05 10:26:40 +03:00 |
|
Triang3l
|
61fd5a6dc2
|
[D3D12] Replicate red channel of single-channel textures
|
2019-01-26 14:11:09 +03:00 |
|
Triang3l
|
b7bcdf3e8b
|
[D3D12] Pre-create EDRAM and shared memory buffer descriptors
|
2019-01-17 16:39:51 +03:00 |
|
Triang3l
|
cf7c981991
|
[D3D12] Cache SRV descriptors in the texture cache to copy instead of creating
|
2019-01-16 19:06:11 +03:00 |
|
Triang3l
|
364cae6cc8
|
[D3D12] Use deferred command list
|
2019-01-03 15:08:49 +03:00 |
|
Triang3l
|
317e5c3ce2
|
[D3D12] Some stats in the profiler, tweak tiled buffer heap sizes
|
2018-12-30 15:09:58 +03:00 |
|
Triang3l
|
952819ed87
|
[D3D12] Don't 4KB-align sizes of resolve destinations
|
2018-12-13 15:22:16 +03:00 |
|
Triang3l
|
9427667a27
|
[D3D12] Experimental 2x resolution scale
|
2018-12-06 10:38:13 +03:00 |
|
Triang3l
|
38f421e89f
|
[D3D12] GPUTEXTUREFORMAT_6_5_5 as RBG
|
2018-11-16 12:56:19 +03:00 |
|
Triang3l
|
e1d771ab9c
|
[D3D12] GPUTEXTUREFORMAT_11_11_10 support
|
2018-11-14 17:02:19 +03:00 |
|
Triang3l
|
8ff03bcfa0
|
[D3D12] Allow different loading modes for unsigned and signed textures
|
2018-11-14 13:52:16 +03:00 |
|
Triang3l
|
4ad1c2c538
|
[D3D12] R11G11B10 unorm textures
|
2018-11-13 19:00:01 +03:00 |
|
Triang3l
|
251f078baf
|
[D3D12] Fix mipmapped cubemaps and stacked textures
|
2018-10-29 22:40:29 +03:00 |
|