90 lines
2.0 KiB
ArmAsm
90 lines
2.0 KiB
ArmAsm
test_divdx_1:
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#_ REGISTER_IN r4 0x0000000000001000
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#_ REGISTER_IN r5 0x0000000000000010
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divd. r3, r4, r5
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mfcr r12
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blr
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#_ REGISTER_OUT r3 0x0000000000000100
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#_ REGISTER_OUT r12 0x0000000040000000
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test_divdx_1_constant:
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li r4, 0x1000
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li r5, 0x10
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divd. r3, r4, r5
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mfcr r12
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blr
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#_ REGISTER_OUT r3 0x0000000000000100
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#_ REGISTER_OUT r12 0x0000000040000000
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test_divdx_negative:
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#_ REGISTER_IN r4 0xFFFFFFFFFFFFF000
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#_ REGISTER_IN r5 0x0000000000000010
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divd. r3, r4, r5
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mfcr r12
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blr
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#_ REGISTER_OUT r3 0xFFFFFFFFFFFFFF00
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#_ REGISTER_OUT r12 0x0000000080000000
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test_divdx_by_zero:
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#_ REGISTER_IN r4 0x0000000000001000
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#_ REGISTER_IN r5 0x0000000000000000
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divd. r3, r4, r5
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mfcr r12
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blr
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#_ REGISTER_OUT r3 0x0000000000000000
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#_ REGISTER_OUT r12 0x0000000020000000
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test_divdux_1:
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#_ REGISTER_IN r4 0x0000000000001000
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#_ REGISTER_IN r5 0x0000000000000010
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divdu. r3, r4, r5
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mfcr r12
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blr
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#_ REGISTER_OUT r3 0x0000000000000100
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#_ REGISTER_OUT r12 0x0000000040000000
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test_divdux_large:
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#_ REGISTER_IN r4 0xFFFFFFFFFFFFFFFF
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#_ REGISTER_IN r5 0x0000000000000002
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divdu. r3, r4, r5
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mfcr r12
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blr
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#_ REGISTER_OUT r3 0x7FFFFFFFFFFFFFFF
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#_ REGISTER_OUT r12 0x0000000080000000
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test_divwx_1:
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#_ REGISTER_IN r4 0x0000000000001000
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#_ REGISTER_IN r5 0x0000000000000010
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divw. r3, r4, r5
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mfcr r12
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blr
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#_ REGISTER_OUT r3 0x0000000000000100
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#_ REGISTER_OUT r12 0x0000000040000000
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test_divwx_negative:
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#_ REGISTER_IN r4 0x00000000FFFFF000
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#_ REGISTER_IN r5 0x0000000000000010
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divw. r3, r4, r5
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mfcr r12
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blr
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#_ REGISTER_OUT r3 0x00000000FFFFFF00
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#_ REGISTER_OUT r12 0x0000000080000000
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test_divwux_1:
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#_ REGISTER_IN r4 0x0000000000001000
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#_ REGISTER_IN r5 0x0000000000000010
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divwu. r3, r4, r5
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mfcr r12
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blr
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#_ REGISTER_OUT r3 0x0000000000000100
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#_ REGISTER_OUT r12 0x0000000040000000
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test_divwux_large:
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#_ REGISTER_IN r4 0x00000000FFFFFFFF
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#_ REGISTER_IN r5 0x0000000000000002
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divwu. r3, r4, r5
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mfcr r12
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blr
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#_ REGISTER_OUT r3 0x000000007FFFFFFF
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#_ REGISTER_OUT r12 0x0000000040000000
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