Files
Xenia-Canary/src/xenia/cpu/backend/x64/x64_util.h
Herman S. bc37068f90 [x64] Fix AVX-512 VECTOR_DENORMFLUSH merge-masking & FpRangeSign values
Copy src1 into dest before the masked vrangeps so that unmasked lanes
(normal/inf/NaN values) are preserved via merge-masking. Previously,
when the register allocator assigned different physical registers for
dest and src1, unmasked lanes would retain stale values from dest.

Tested with Intel SDE and AVX-512 cpu to verify.

Also shift unused FpRangeSign constants into bits [3:2] of the vrangeps
immediate, matching the Intel encoding. Only one used in the code was 0
so it was already correct by accident but using the others in the future
would produce incorrect results.
2026-03-21 15:16:59 +09:00

62 lines
2.0 KiB
C++

/**
******************************************************************************
* Xenia : Xbox 360 Emulator Research Project *
******************************************************************************
* Copyright 2022 Ben Vanik. All rights reserved. *
* Released under the BSD license - see LICENSE in the root for more details. *
******************************************************************************
*/
#ifndef XENIA_CPU_BACKEND_X64_X64_UTIL_H_
#define XENIA_CPU_BACKEND_X64_X64_UTIL_H_
#include "xenia/base/vec128.h"
#include "xenia/cpu/backend/x64/x64_backend.h"
#include "xenia/cpu/backend/x64/x64_emitter.h"
namespace xe {
namespace cpu {
namespace backend {
namespace x64 {
// Used to generate ternary logic truth-tables for vpternlog
// Use these to directly refer to terms and perform binary operations upon them
// and the resulting value will be the ternary lookup table
// ex:
// (TernaryOperand::a | ~TernaryOperand::b) & TernaryOperand::c
// = 0b10100010
// = 0xa2
// vpternlog a, b, c, 0xa2
//
// ~(TernaryOperand::a ^ TernaryOperand::b) & TernaryOperand::c
// = 0b10000010
// = 0x82
// vpternlog a, b, c, 0x82
namespace TernaryOperand {
constexpr uint8_t a = 0b11110000;
constexpr uint8_t b = 0b11001100;
constexpr uint8_t c = 0b10101010;
} // namespace TernaryOperand
// Opcodes for use with vrange* instructions
namespace FpRangeSelect {
constexpr uint8_t Min = 0b00;
constexpr uint8_t Max = 0b01;
constexpr uint8_t AbsMin = 0b10; // Smaller absolute value
constexpr uint8_t AbsMax = 0b11; // Larger absolute value
}; // namespace FpRangeSelect
namespace FpRangeSign {
constexpr uint8_t OperandA = 0b0000; // Copy sign of operand A
constexpr uint8_t Preserve = 0b0100; // Leave sign as is
constexpr uint8_t Positive = 0b1000; // Set Positive
constexpr uint8_t Negative = 0b1100; // Set Negative
}; // namespace FpRangeSign
} // namespace x64
} // namespace backend
} // namespace cpu
} // namespace xe
#endif // XENIA_CPU_BACKEND_X64_X64_UTIL_H_