27 lines
1.0 KiB
ArmAsm
27 lines
1.0 KiB
ArmAsm
test_stvxl128_1:
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# Store vector 128 with cache hint
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#_ MEMORY_IN 0x0000000010001000 [CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC]
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#_ REGISTER_IN r4 0x0000000010001000
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#_ REGISTER_IN v3 [01020304, 05060708, 090A0B0C, 0D0E0F10]
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li r5, 0
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stvxl128 v3, r4, r5
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blr
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#_ REGISTER_OUT r4 0x0000000010001000
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#_ REGISTER_OUT r5 0
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#_ REGISTER_OUT v3 [01020304, 05060708, 090A0B0C, 0D0E0F10]
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#_ MEMORY_OUT 10001000 0102030405060708090A0B0C0D0E0F10
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test_stvxl128_2:
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# Test with offset
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#_ MEMORY_IN 0x0000000010001000 [CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC]
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#_ MEMORY_IN 0x0000000010001010 [CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC]
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#_ REGISTER_IN r4 0x0000000010001000
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#_ REGISTER_IN v3 [AABBCCDD, EEFF0011, 22334455, 66778899]
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li r5, 16
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stvxl128 v3, r4, r5
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blr
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#_ REGISTER_OUT r4 0x0000000010001000
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#_ REGISTER_OUT r5 16
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#_ REGISTER_OUT v3 [AABBCCDD, EEFF0011, 22334455, 66778899]
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#_ MEMORY_OUT 10001010 AABBCCDDEEFF00112233445566778899
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