fix(cpu): PPCBUG-221+227 round_to_i64 + PPCBUG-432 vrfin round-to-even
Phase 5 batch 1 (5a): round-to-int correctness. PPCBUG-221+227 (coupled): round_to_i64 NearestEven tie-breaking used `(diff - 0.5).abs() < f64::EPSILON` to detect half-integers, but for |v| > 2^52 every f64 value is an exact integer (v.trunc() == v), giving diff == 0. The buggy check fell through to v.round() (round-half-away- from-zero), giving wrong results for large odd half-integers. Replaced with a fractional-part-only check that's exact for |v| <= 2^52 and degenerates to truncation above. PPCBUG-432: vrfin/vrfin128 used Rust's `f32::round()` which is round- half-away-from-zero. ISA requires round-to-nearest-even (banker's rounding). Implemented inline. PPCBUG-201 (FPSCR.RN for double arithmetic) deferred — requires MXCSR-set/restore wrappers around 10+ FPU arms; will land in a focused sub-batch after the remaining 5a-5f fixes. Tests: - round_to_i64_nearest_even_on_tie: extended with 0.5, 1.5, -0.5, -1.5. - round_to_i64_non_tie_cases: 0.4/0.6 (non-tie sanity). - round_to_i32_nearest_even_on_tie: PPCBUG-227 coverage. Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com>
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@@ -220,15 +220,22 @@ pub fn round_to_single(ctx: &PpcContext, v: f64) -> f64 {
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pub fn round_to_i64(ctx: &PpcContext, v: f64) -> i64 {
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match rounding_mode(ctx) {
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RoundingMode::NearestEven => {
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// Round-half-to-even (banker's rounding).
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let r = v.round();
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// Rust's f64::round is round-half-away-from-zero. Correct ties to even:
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let diff = (v - v.trunc()).abs();
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if (diff - 0.5).abs() < f64::EPSILON {
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let floor = v.floor();
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if (floor as i64) & 1 == 0 { floor as i64 } else { v.ceil() as i64 }
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// PPCBUG-221: round-half-to-even (banker's rounding). The previous
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// tie-detection used `(diff - 0.5).abs() < f64::EPSILON` which
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// breaks for |v| > 2^52 (where v.trunc() == v exactly, giving diff
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// == 0). Use a fractional-part-only check that's exact for
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// |v| <= 2^52 and degenerates correctly above.
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let t = v.trunc();
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let frac = v - t;
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let fa = frac.abs();
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if fa > 0.5 {
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t as i64 + if v >= 0.0 { 1 } else { -1 }
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} else if fa < 0.5 {
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t as i64
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} else {
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r as i64
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// Exact 0.5 tie — round to even.
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let fi = t as i64;
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if fi & 1 == 0 { fi } else { fi + if v >= 0.0 { 1 } else { -1 } }
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}
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}
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RoundingMode::TowardZero => v.trunc() as i64,
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@@ -355,11 +362,35 @@ mod tests {
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#[test]
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fn round_to_i64_nearest_even_on_tie() {
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let c = ctx();
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assert_eq!(round_to_i64(&c, 0.5_f64), 0);
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assert_eq!(round_to_i64(&c, 1.5_f64), 2);
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assert_eq!(round_to_i64(&c, 2.5_f64), 2);
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assert_eq!(round_to_i64(&c, 3.5_f64), 4);
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assert_eq!(round_to_i64(&c, -0.5_f64), 0);
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assert_eq!(round_to_i64(&c, -1.5_f64), -2);
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assert_eq!(round_to_i64(&c, -2.5_f64), -2);
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}
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#[test]
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fn round_to_i64_non_tie_cases() {
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// PPCBUG-221 regression: non-tie fractions must round to nearest.
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let c = ctx();
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assert_eq!(round_to_i64(&c, 0.4_f64), 0);
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assert_eq!(round_to_i64(&c, 0.6_f64), 1);
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assert_eq!(round_to_i64(&c, -0.4_f64), 0);
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assert_eq!(round_to_i64(&c, -0.6_f64), -1);
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}
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#[test]
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fn round_to_i32_nearest_even_on_tie() {
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// PPCBUG-227: round_to_i32 inherits round_to_i64's tie semantics.
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let c = ctx();
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assert_eq!(round_to_i32(&c, 0.5_f64), 0);
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assert_eq!(round_to_i32(&c, 1.5_f64), 2);
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assert_eq!(round_to_i32(&c, 2.5_f64), 2);
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assert_eq!(round_to_i32(&c, -1.5_f64), -2);
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}
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#[test]
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fn check_invalid_add_detects_inf_minus_inf() {
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let mut c = ctx();
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@@ -2398,11 +2398,25 @@ fn execute(ctx: &mut PpcContext, mem: &dyn MemoryAccess, instr: &DecodedInstr) -
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ctx.pc += 4;
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}
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PpcOpcode::vrfin | PpcOpcode::vrfin128 => {
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// PPCBUG-432: ISA round-to-nearest-even, NOT Rust's round-half-away-from-zero.
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let vb = if matches!(instr.opcode, PpcOpcode::vrfin128) { instr.vb128() } else { instr.rb() };
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let vd = if matches!(instr.opcode, PpcOpcode::vrfin128) { instr.vd128() } else { instr.rd() };
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let b = ctx.vr[vb].as_f32x4();
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let mut r = [0f32; 4];
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for i in 0..4 { r[i] = b[i].round(); }
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for i in 0..4 {
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let x = b[i];
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let t = x.trunc();
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let frac = (x - t).abs();
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r[i] = if frac > 0.5 {
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t + if x >= 0.0 { 1.0 } else { -1.0 }
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} else if frac < 0.5 {
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t
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} else {
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// Tie — round to even.
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let ti = t as i64;
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if ti & 1 == 0 { t } else { t + if x >= 0.0 { 1.0 } else { -1.0 } }
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};
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}
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ctx.vr[vd] = xenia_types::Vec128::from_f32x4_array(r);
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ctx.pc += 4;
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}
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