Source changes (dormant parity infra, retained from iterate 2.AI/2.AO): - xenia-kernel/exports.rs: nt_create_event manual_reset polarity + related event wiring - xenia-gpu/mmio_region.rs: D1MODE_VBLANK_VLINE_STATUS hardcode parity Also lands the audit-runs/ analysis notes (.md/.txt/.json digests) for the iterate 2.x VSync/0x10e8/0x1004 wedge investigation. Raw trace dumps (.jsonl/.gz/.csv/.stdout) and agent worktrees (.claude/) are gitignored as regenerable local artifacts — see memory + HANDOFF for the running findings. Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
197 lines
6.9 KiB
Diff
197 lines
6.9 KiB
Diff
diff --git a/src/xenia/cpu/backend/x64/x64_emitter.cc b/src/xenia/cpu/backend/x64/x64_emitter.cc
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index 5da8f6adc..e54f1f3e0 100644
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--- a/src/xenia/cpu/backend/x64/x64_emitter.cc
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+++ b/src/xenia/cpu/backend/x64/x64_emitter.cc
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@@ -13,6 +13,8 @@
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#include <climits>
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#include <cstring>
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+#include <string>
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+#include <vector>
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#include "third_party/fmt/include/fmt/format.h"
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#include "xenia/base/assert.h"
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@@ -63,6 +65,47 @@ DEFINE_bool(instrument_call_times, false,
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"Compute time taken for functions, for profiling guest code",
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"x64");
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#endif
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+
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+// AUDIT-061: forward decl of the PC table (defined in ppc_hir_builder.cc).
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+namespace xe {
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+namespace cpu {
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+namespace audit61 {
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+const std::vector<uint32_t>& pcs();
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+} // namespace audit61
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+} // namespace cpu
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+} // namespace xe
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+
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+// AUDIT-061: handler for trap codes >= 200. arg0 carries trap idx
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+// (trap_code - 200), mapping to ::xe::cpu::audit61::pcs()[idx]. Emits one
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+// log line per fire with cr0/cr6 LGE flags + key GPRs + LR + tid.
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+static uint64_t TrapAudit61Branch(void* raw_context, uint64_t idx) {
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+ auto* ctx = reinterpret_cast<xe::cpu::ppc::PPCContext_s*>(raw_context);
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+ const auto& pcs = ::xe::cpu::audit61::pcs();
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+ uint32_t pc = (idx < pcs.size()) ? pcs[static_cast<size_t>(idx)] : 0u;
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+ uint32_t tid = 0;
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+ if (ctx->thread_state) {
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+ tid = ctx->thread_state->thread_id();
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+ }
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+ auto enc = [](uint8_t lt, uint8_t gt, uint8_t eq) {
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+ char buf[4];
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+ buf[0] = lt ? 'L' : '.';
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+ buf[1] = gt ? 'G' : '.';
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+ buf[2] = eq ? 'E' : '.';
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+ buf[3] = '\0';
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+ return std::string(buf);
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+ };
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+ XELOGI(
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+ "AUDIT-061-BR pc={:08X} lr={:08X} cr0={} cr6={} r3={:08X} r4={:08X} "
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+ "r5={:08X} r6={:08X} r31={:08X} tid={}",
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+ pc, static_cast<uint32_t>(ctx->lr),
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+ enc(ctx->cr0.cr0_lt, ctx->cr0.cr0_gt, ctx->cr0.cr0_eq),
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+ enc(ctx->cr6.cr6_all_equal, ctx->cr6.cr6_1, ctx->cr6.cr6_none_equal),
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+ static_cast<uint32_t>(ctx->r[3]), static_cast<uint32_t>(ctx->r[4]),
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+ static_cast<uint32_t>(ctx->r[5]), static_cast<uint32_t>(ctx->r[6]),
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+ static_cast<uint32_t>(ctx->r[31]), tid);
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+ return 0;
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+}
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+
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namespace xe {
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namespace cpu {
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namespace backend {
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@@ -455,6 +498,13 @@ void X64Emitter::Trap(uint16_t trap_type) {
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// ?
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break;
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default:
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+ // AUDIT-061: trap codes >= 200 dispatch the branch-probe handler.
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+ // arg0 = idx into ::xe::cpu::audit61::pcs().
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+ if (trap_type >= 200) {
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+ CallNative(::TrapAudit61Branch,
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+ static_cast<uint64_t>(trap_type - 200));
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+ break;
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+ }
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XELOGW("Unknown trap type {}", trap_type);
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db(0xCC);
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break;
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diff --git a/src/xenia/cpu/cpu_flags.cc b/src/xenia/cpu/cpu_flags.cc
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index 3ff067e15..2acce8db3 100644
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--- a/src/xenia/cpu/cpu_flags.cc
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+++ b/src/xenia/cpu/cpu_flags.cc
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@@ -57,3 +57,16 @@ DEFINE_bool(break_condition_truncate, true, "truncate value to 32-bits", "CPU");
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DEFINE_bool(break_on_debugbreak, true, "int3 on JITed __debugbreak requests.",
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"CPU");
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+
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+// AUDIT-DEMO: smoke marker (memory entry: emulator.cc:225,283). Always-on bool.
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+DEFINE_bool(audit_demo_setup_trace, true,
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+ "Audit smoke marker: log AUDIT-DEMO-SETUP-BEGIN at emulator setup.",
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+ "Audit");
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+
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+// AUDIT-061: comma-separated list of guest PCs to log on each fire.
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+// Format: "0xPC1,0xPC2,..." (max 32 PCs). Each fire emits
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+// AUDIT-061-BR pc=X lr=X cr0=LGE cr6=LGE r3=X r4=X r5=X r6=X r31=X tid=N.
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+// Default empty (off); no perf cost when empty.
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+DEFINE_string(audit_61_branch_probe_pcs, "",
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+ "AUDIT-061: CSV of guest PCs to trace (cr0/cr6 + regs/tid).",
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+ "Audit");
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diff --git a/src/xenia/cpu/cpu_flags.h b/src/xenia/cpu/cpu_flags.h
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index 38c4f98ba..5731804f4 100644
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--- a/src/xenia/cpu/cpu_flags.h
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+++ b/src/xenia/cpu/cpu_flags.h
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@@ -35,4 +35,11 @@ DECLARE_bool(break_condition_truncate);
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DECLARE_bool(break_on_debugbreak);
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+// AUDIT-DEMO smoke marker.
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+DECLARE_bool(audit_demo_setup_trace);
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+
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+// AUDIT-061: multi-PC branch probe — emits one log line per fire with
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+// (pc, lr, cr0 LGE, cr6 LGE, r3, r4, r5, r6, r31, tid). CSV of guest PCs.
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+DECLARE_string(audit_61_branch_probe_pcs);
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+
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#endif // XENIA_CPU_CPU_FLAGS_H_
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diff --git a/src/xenia/cpu/ppc/ppc_hir_builder.cc b/src/xenia/cpu/ppc/ppc_hir_builder.cc
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index 42d996cba..adc431fd2 100644
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--- a/src/xenia/cpu/ppc/ppc_hir_builder.cc
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+++ b/src/xenia/cpu/ppc/ppc_hir_builder.cc
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@@ -34,6 +34,58 @@ DEFINE_bool(
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"unimplemented PowerPC instruction is encountered.",
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"CPU");
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+// AUDIT-061 — multi-PC branch probe. Parses cvars::audit_61_branch_probe_pcs
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+// once and exposes a (pc -> trap_id) lookup table. trap_id range [200, 65535].
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+// PCs outside the table are not probed. Native side reads g_audit61_pcs[idx].
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+#include <vector>
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+#include <string>
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+namespace xe {
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+namespace cpu {
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+namespace audit61 {
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+constexpr uint16_t kTrapBase = 200;
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+constexpr size_t kMaxPcs = 32;
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+static std::vector<uint32_t> g_pcs;
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+static bool g_parsed = false;
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+
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+const std::vector<uint32_t>& pcs() {
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+ if (!g_parsed) {
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+ g_parsed = true;
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+ const std::string& csv = cvars::audit_61_branch_probe_pcs;
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+ size_t pos = 0;
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+ while (pos < csv.size() && g_pcs.size() < kMaxPcs) {
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+ size_t end = csv.find(',', pos);
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+ std::string tok = csv.substr(pos, end - pos);
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+ // strip whitespace
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+ while (!tok.empty() && (tok.front() == ' ' || tok.front() == '\t'))
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+ tok.erase(tok.begin());
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+ while (!tok.empty() && (tok.back() == ' ' || tok.back() == '\t'))
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+ tok.pop_back();
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+ if (!tok.empty()) {
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+ try {
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+ uint32_t v = static_cast<uint32_t>(std::stoul(tok, nullptr, 0));
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+ g_pcs.push_back(v);
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+ } catch (...) {
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+ }
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+ }
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+ if (end == std::string::npos) break;
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+ pos = end + 1;
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+ }
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+ }
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+ return g_pcs;
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+}
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+
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+// Returns trap id for pc, or 0 if pc not in probe set.
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+uint16_t trap_id_for(uint32_t pc) {
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+ const auto& v = pcs();
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+ for (size_t i = 0; i < v.size(); ++i) {
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+ if (v[i] == pc) return static_cast<uint16_t>(kTrapBase + i);
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+ }
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+ return 0;
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+}
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+} // namespace audit61
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+} // namespace cpu
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+} // namespace xe
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+
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namespace xe {
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namespace cpu {
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namespace ppc {
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@@ -174,6 +226,20 @@ bool PPCHIRBuilder::Emit(GuestFunction* function, uint32_t flags) {
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MaybeBreakOnInstruction(address);
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+ // AUDIT-061: emit a trap before this instruction if it's on the probe
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+ // list. The trap fires BEFORE the cmp/branch HIR emit so the native
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+ // handler observes cr0/cr6 set by the *previous* instruction (the cmp
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+ // that controls this conditional branch). ContextBarrier flushes
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+ // HIR temporaries to PPCContext so the handler reads consistent state.
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+ if (!::xe::cpu::audit61::pcs().empty()) {
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+ uint16_t tid = ::xe::cpu::audit61::trap_id_for(address);
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+ if (tid != 0) {
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+ Comment("--audit_61_branch_probe target");
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+ ContextBarrier();
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+ Trap(tid);
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+ }
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+ }
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+
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InstrData i;
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i.address = address;
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i.code = code;
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