c36cca14f9
Split the monolithic interpreter into cohesive modules: dedicated decoder (decoder.rs) producing 8-byte DecodedInstr; opcode tables (opcode.rs); explicit traps (trap.rs); FPSCR helpers (fpscr.rs); overflow/carry helpers (overflow.rs); a 4 KiB-page-versioned decode cache and basic-block cache (block_cache.rs); and a full VMX/VMX128 implementation (vmx.rs) covering AltiVec + Xenon's 128-bit extensions. Add the parallel-execution substrate behind --parallel: a 7-party phaser (phaser.rs) for round-based barrier sync, ReservationTable (reservation.rs) for guest LL/SC, and the per-HW-thread scheduler core (scheduler.rs) that owns ThreadRefs, runqueues, and pending IRQs. Disassembler is now the single source of truth: disasm.rs gains the full base + extended + VMX128 mnemonic set, with golden JSON fixtures and a disasm_goldens test suite. Add a criterion-style interpreter bench. context.rs grows the per-thread state the new modules need (reservation slot, FPSCR, vector regs). Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
138 lines
3.2 KiB
JSON
138 lines
3.2 KiB
JSON
{
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"rows": [
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{
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"label": "vaddubm v3, v4, v5",
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"raw": "0x10642800",
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"addr": "0x82000000",
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"mnemonic": "vaddubm",
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"operands": "v3, v4, v5"
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},
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{
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"label": "vaddfp v3, v4, v5",
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"raw": "0x1064280A",
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"addr": "0x82000000",
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"mnemonic": "vaddfp",
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"operands": "v3, v4, v5"
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},
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{
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"label": "vand v3, v4, v5",
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"raw": "0x10642C04",
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"addr": "0x82000000",
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"mnemonic": "vand",
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"operands": "v3, v4, v5"
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},
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{
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"label": "vor v3, v4, v5",
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"raw": "0x10642C84",
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"addr": "0x82000000",
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"mnemonic": "vor",
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"operands": "v3, v4, v5"
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},
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{
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"label": "vxor v3, v4, v5",
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"raw": "0x10642CC4",
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"addr": "0x82000000",
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"mnemonic": "vxor",
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"operands": "v3, v4, v5"
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},
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{
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"label": "vsel v3,v4,v5,v6",
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"raw": "0x106429AA",
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"addr": "0x82000000",
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"mnemonic": "vsel",
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"operands": "v3, v4, v5, v6"
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},
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{
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"label": "vperm v3,v4,v5,v6",
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"raw": "0x106429AB",
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"addr": "0x82000000",
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"mnemonic": "vperm",
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"operands": "v3, v4, v5, v6"
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},
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{
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"label": "vmaddfp v3, v4, v6, v5 (swap)",
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"raw": "0x106429AE",
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"addr": "0x82000000",
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"mnemonic": "vmaddfp",
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"operands": "v3, v4, v6, v5"
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},
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{
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"label": "mfvscr v3",
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"raw": "0x10600604",
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"addr": "0x82000000",
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"mnemonic": "mfvscr",
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"operands": "v3"
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},
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{
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"label": "mtvscr v5",
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"raw": "0x10002E44",
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"addr": "0x82000000",
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"mnemonic": "mtvscr",
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"operands": "v5"
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},
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{
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"label": "vaddfp128 (encoded sloppily)",
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"raw": "0x14642801",
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"addr": "0x82000000",
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"mnemonic": "vperm128",
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"operands": "v3, v3, v5, 0"
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},
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{
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"label": "encoding vd_hi=00: actually vsrw128",
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"raw": "0x180461D0",
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"addr": "0x82000000",
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"mnemonic": "vsrw128",
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"operands": "v0, v0, v12"
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},
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{
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"label": "encoding vd_hi=10: actually vsrw128 v32",
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"raw": "0x180465D0",
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"addr": "0x82000000",
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"mnemonic": "vsrw128",
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"operands": "v32, v0, v12"
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},
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{
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"label": "encoding vd_hi=01: actually vpermwi128",
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"raw": "0x180463D0",
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"addr": "0x82000000",
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"mnemonic": "vpermwi128",
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"operands": "v64, v12, 0xE4"
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},
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{
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"label": "vrlimi128 v96, v12, 4, 3 (real)",
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"raw": "0x180467D0",
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"addr": "0x82000000",
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"mnemonic": "vrlimi128",
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"operands": "v96, v12, 4, 3"
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},
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{
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"label": "vrlimi128 v127, v127, 4, 3 (real)",
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"raw": "0x1BE4FFD3",
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"addr": "0x82000000",
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"mnemonic": "vrlimi128",
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"operands": "v127, v95, 4, 3"
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},
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{
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"label": "vmaddfp128 v3, v35, v5, v3",
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"raw": "0x146028D4",
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"addr": "0x82000000",
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"mnemonic": "vmaddfp128",
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"operands": "v3, v35, v5, v3"
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},
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{
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"label": "vmaddcfp128 v3, v35, v3, v5",
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"raw": "0x14602914",
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"addr": "0x82000000",
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"mnemonic": "vmaddcfp128",
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"operands": "v3, v35, v3, v5"
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},
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{
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"label": "vnmsubfp128 v3, v35, v3, v5",
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"raw": "0x14602954",
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"addr": "0x82000000",
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"mnemonic": "vnmsubfp128",
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"operands": "v3, v35, v3, v5"
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}
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]
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}
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