e6d43a23ac
Bundles state that lives OUTSIDE the xenia-rs repo so a fresh clone on
another machine can be brought up to identical configuration via
migration/setup.sh:
- claude-memory/ ~/.claude/projects/-home-fabi-RE-Project-Sylpheed/memory/
(103 files, 1.1 MB - MEMORY.md + every
project_xenia_rs_*.md from audits
addis_signext through audit-058)
- project-root/dot-claude/ <project-root>/.claude/settings.json
(Stop hook + permissions)
- project-root/ppc-manual/ <project-root>/ppc-manual/
(PowerPC reference docs, 397 files, 3.7 MB)
- project-root/run-canary.sh <project-root>/run-canary.sh
- README.md Human-readable setup checklist
- setup.sh Idempotent installer (also reclones
xenia-canary at pinned HEAD 6de80dffe)
- MANIFEST.md Per-file mapping + per-file-not-bundled
restoration recipe
Excluded from bundle (not shippable via git):
- Sylpheed ISO (7.8 GB; copyright; manual copy required)
- sylpheed.db (395 MB; regenerable from XEX via analysis tooling)
- target/ build artifacts (rebuild on target)
- audit-runs probe firehoses (.log/.stdout/.stderr ~11 GB; rerun if needed)
- audit-runs memory dumps (.bin ~4.5 GB; rerun audit-026/027/029 if needed)
- xenia-canary checkout (setup.sh reclones from
git.mc02.dev/fabi/Xenia-Canary.git at HEAD 6de80dffe)
Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
128 lines
4.9 KiB
Markdown
128 lines
4.9 KiB
Markdown
# `cmpl` — Compare Logical
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> **Category:** [Integer ALU](../categories/alu.md) · **Form:** [X](../forms/X.md) · **Opcode:** `0x7c000040`
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<!-- GENERATED: BEGIN -->
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## Assembler Mnemonics
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| Mnemonic | XML entry | Flags | Description |
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| --- | --- | --- | --- |
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| `cmpl` | `cmpl` | — | Compare Logical |
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## Syntax
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```asm
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cmpl [CRFD], [L], [RA], [RB]
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```
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## Encoding
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### `cmpl` — form `X`
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- **Opcode word:** `0x7c000040`
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- **Primary opcode (bits 0–5):** `31`
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- **Extended opcode:** `32`
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- **Synchronising:** no
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| Bits | Field | Meaning |
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| --- | --- | --- |
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| 0–5 | `OPCD` | primary opcode |
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| 6–10 | `RT/FRT/VRT` | destination |
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| 11–15 | `RA/FRA/VRA` | source A |
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| 16–20 | `RB/FRB/VRB` | source B |
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| 21–30 | `XO` | extended opcode (10 bits) |
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| 31 | `Rc` | record-form flag |
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## Operands
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| Field | Role | Description |
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| --- | --- | --- |
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| `L` | cmpl: read | Operand-length bit for compare instructions (`0 ⇒ 32-bit`, `1 ⇒ 64-bit`). |
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| `RA` | cmpl: read | Source GPR (`r0`–`r31`). |
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| `RB` | cmpl: read | Source GPR. |
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| `CRFD` | cmpl: write | CR destination field (`crf`, 0–7). |
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## Register Effects
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### `cmpl`
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- **Reads (always):** `L`, `RA`, `RB`
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- **Reads (conditional):** _none_
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- **Writes (always):** `CRFD`
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- **Writes (conditional):** _none_
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## Status-Register Effects
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_No condition-register or status-register effects._
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## Operation (pseudocode)
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```
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if L = 0 then a,b <- (RA)[32:63], (RB)[32:63]
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else a,b <- (RA), (RB)
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CR[BF] <- unsigned_compare(a, b) || XER[SO]
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```
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## C Translation Example
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```c
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/* C translation: the xenia-rs interpreter arm below in */
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/* Implementation References is the authoritative semantic */
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/* snapshot. Translate it line-by-line: */
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/* - ctx.gpr[N] -> r[N] (or f[]/v[] for FPRs/VRs) */
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/* - mem.read_u*/write_u* -> mem_read_u*_be / mem_write_u*_be */
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/* - ctx.update_cr_signed(fld, v) -> update_cr_signed(fld, v) */
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/* - ctx.xer_ca / xer_ov / xer_so -> xer.CA / xer.OV / xer.SO */
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/* The Register Effects and Status-Register Effects tables above */
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/* enumerate every side effect a faithful translation must emit. */
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```
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## Implementation References
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**`cmpl`**
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- xenia-canary XML: [`tools/ppc-instructions.xml` — search for `mnem="cmpl"`](../../xenia-canary/tools/ppc-instructions.xml)
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- xenia-canary emit: [`src/xenia/cpu/ppc/ppc_emit_alu.cc:579`](../../xenia-canary/src/xenia/cpu/ppc/ppc_emit_alu.cc#L579)
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- xenia-rs opcode: [`crates/xenia-cpu/src/opcode.rs:13`](../../xenia-rs/crates/xenia-cpu/src/opcode.rs#L13)
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- xenia-rs decoder: [`crates/xenia-cpu/src/decoder.rs:761`](../../xenia-rs/crates/xenia-cpu/src/decoder.rs#L761)
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- xenia-rs interpreter: [`crates/xenia-cpu/src/interpreter.rs:886-894`](../../xenia-rs/crates/xenia-cpu/src/interpreter.rs#L886-L894)
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<details><summary>xenia-rs interpreter body (frozen snapshot)</summary>
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```rust
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PpcOpcode::cmpl => {
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let bf = instr.crfd();
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if instr.l() {
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ctx.update_cr_unsigned(bf, ctx.gpr[instr.ra()], ctx.gpr[instr.rb()]);
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} else {
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ctx.update_cr_unsigned(bf, ctx.gpr[instr.ra()] as u32 as u64, ctx.gpr[instr.rb()] as u32 as u64);
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}
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ctx.pc += 4;
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}
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```
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</details>
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<!-- GENERATED: END -->
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## Special Cases & Edge Conditions
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- **Unsigned compare.** Treats both operands as unsigned magnitudes. The simplified mnemonics are `cmplw` (`L=0`) and `cmpld` (`L=1`).
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- **`L = 0`: 32-bit operands.** Xenia narrows both registers via `as u32 as u64` so the high 32 bits of `RA`/`RB` are ignored — this matches spec `(RA)[32:63]` semantics. Most Xbox 360 code uses this mode.
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- **`L = 1`: full 64-bit unsigned compare.** Used in 64-bit pointer arithmetic; rare in game code but appears in kernel-side helpers.
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- **SO is copied from `XER[SO]`.** `cmpl` does not clear or set sticky overflow; it just exposes the current `SO` in the destination CR field's `SO` slot.
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- **`BF` is a CR field 0–7.** Same convention as [`cmp`](cmp.md). Two consecutive `cmpl` instructions with the same `BF` simply overwrite the previous result.
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- **Common signed/unsigned bug.** Misusing `cmp` instead of `cmpl` (or vice versa) for pointer comparisons is the canonical bug in PPC porting; pointers are always unsigned in C semantics. Always cross-check the comparison polarity in disassembly.
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- **No `Rc`/`OE`** and no GPR write — purely a CR-field producer.
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## Related Instructions
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- [`cmp`](cmp.md) — signed register compare.
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- [`cmpli`](cmpli.md) — unsigned compare against a 16-bit immediate.
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- [`cmpi`](cmpi.md) — signed immediate compare.
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- `cmplw`, `cmpld` (simplified) — preferred forms in disassembly.
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- [`mcrxr`](mcrxr.md) — clear sticky overflow.
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## IBM Reference
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- [AIX 7.3 — `cmpl` (Compare Logical)](https://www.ibm.com/docs/en/aix/7.3.0?topic=set-cmpl-compare-logical-instruction)
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- [AIX 7.3 — `cmplw` / `cmpld` (simplified mnemonics)](https://www.ibm.com/docs/en/aix/7.3.0?topic=mnemonics-cmplw-compare-logical-word)
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