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e6d43a23ac393004d2e5adf2f0395fd0b5e6448b
xenia-rs/migration/project-root/ppc-manual/forms/X.md
MechaCat02 e6d43a23ac chore: add migration/ bundle for cross-machine setup 
Bundles state that lives OUTSIDE the xenia-rs repo so a fresh clone on
another machine can be brought up to identical configuration via
migration/setup.sh:

  - claude-memory/             ~/.claude/projects/-home-fabi-RE-Project-Sylpheed/memory/
                               (103 files, 1.1 MB - MEMORY.md + every
                                project_xenia_rs_*.md from audits
                                addis_signext through audit-058)
  - project-root/dot-claude/   <project-root>/.claude/settings.json
                               (Stop hook + permissions)
  - project-root/ppc-manual/   <project-root>/ppc-manual/
                               (PowerPC reference docs, 397 files, 3.7 MB)
  - project-root/run-canary.sh <project-root>/run-canary.sh
  - README.md                  Human-readable setup checklist
  - setup.sh                   Idempotent installer (also reclones
                               xenia-canary at pinned HEAD 6de80dffe)
  - MANIFEST.md                Per-file mapping + per-file-not-bundled
                               restoration recipe

Excluded from bundle (not shippable via git):
  - Sylpheed ISO (7.8 GB; copyright; manual copy required)
  - sylpheed.db (395 MB; regenerable from XEX via analysis tooling)
  - target/ build artifacts (rebuild on target)
  - audit-runs probe firehoses (.log/.stdout/.stderr ~11 GB; rerun if needed)
  - audit-runs memory dumps (.bin ~4.5 GB; rerun audit-026/027/029 if needed)
  - xenia-canary checkout (setup.sh reclones from
    git.mc02.dev/fabi/Xenia-Canary.git at HEAD 6de80dffe)

Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
2026-05-10 21:38:38 +02:00

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This file contains ambiguous Unicode characters
This file contains Unicode characters that might be confused with other characters. If you think that this is intentional, you can safely ignore this warning. Use the Escape button to reveal them.
# Form `X` — X — Extended (10-bit extended opcode)
## Bit Layout
| Bits | Field | Meaning |
| --- | --- | --- |
| 0–5 | `OPCD` | primary opcode |
| 6–10 | `RT/FRT/VRT` | destination |
| 11–15 | `RA/FRA/VRA` | source A |
| 16–20 | `RB/FRB/VRB` | source B |
| 21–30 | `XO` | extended opcode (10 bits) |
| 31 | `Rc` | record-form flag |
## Instructions Using This Form
<!-- GENERATED: BEGIN -->
| Mnemonic | Opcode | Group | Description |
| --- | --- | --- | --- |
| [`cmp`](../alu/cmp.md) | `0x7c000000` | integer | Compare |
| [`tw`](../branch/tw.md) | `0x7c000008` | branch | Trap Word |
| [`lvsl`](../vmx/lvsl.md) | `0x7c00000c` | vmx | Load Vector for Shift Left Indexed |
| [`lvebx`](../memory/lvebx.md) | `0x7c00000e` | memory | Load Vector Element Byte Indexed |
| [`mfcr`](../control/mfcr.md) | `0x7c000026` | control | Move from Condition Register |
| [`lwarx`](../memory/lwarx.md) | `0x7c000028` | memory | Load Word and Reserve Indexed |
| [`ldx`](../memory/ld.md) | `0x7c00002a` | memory | Load Doubleword Indexed |
| [`lwzx`](../memory/lwz.md) | `0x7c00002e` | memory | Load Word and Zero Indexed |
| [`slwx`](../alu/slwx.md) | `0x7c000030` | integer | Shift Left Word |
| [`cntlzwx`](../alu/cntlzwx.md) | `0x7c000034` | integer | Count Leading Zeros Word |
| [`sldx`](../alu/sldx.md) | `0x7c000036` | integer | Shift Left Doubleword |
| [`andx`](../alu/andx.md) | `0x7c000038` | integer | AND |
| [`cmpl`](../alu/cmpl.md) | `0x7c000040` | integer | Compare Logical |
| [`lvsr`](../vmx/lvsr.md) | `0x7c00004c` | vmx | Load Vector for Shift Right Indexed |
| [`lvehx`](../memory/lvehx.md) | `0x7c00004e` | memory | Load Vector Element Half Word Indexed |
| [`ldux`](../memory/ld.md) | `0x7c00006a` | memory | Load Doubleword with Update Indexed |
| [`dcbst`](../memory/dcbst.md) | `0x7c00006c` | memory | Data Cache Block Store |
| [`lwzux`](../memory/lwz.md) | `0x7c00006e` | memory | Load Word and Zero with Update Indexed |
| [`cntlzdx`](../alu/cntlzdx.md) | `0x7c000074` | integer | Count Leading Zeros Doubleword |
| [`andcx`](../alu/andcx.md) | `0x7c000078` | integer | AND with Complement |
| [`td`](../branch/td.md) | `0x7c000088` | branch | Trap Doubleword |
| [`lvewx`](../memory/lvewx.md) | `0x7c00008e` | memory | Load Vector Element Word Indexed |
| [`mfmsr`](../control/mfmsr.md) | `0x7c0000a6` | control | Move from Machine State Register |
| [`ldarx`](../memory/ldarx.md) | `0x7c0000a8` | memory | Load Doubleword and Reserve Indexed |
| [`dcbf`](../memory/dcbf.md) | `0x7c0000ac` | memory | Data Cache Block Flush |
| [`lbzx`](../memory/lbz.md) | `0x7c0000ae` | memory | Load Byte and Zero Indexed |
| [`lvx`](../memory/lvx.md) | `0x7c0000ce` | memory | Load Vector Indexed |
| [`lbzux`](../memory/lbz.md) | `0x7c0000ee` | memory | Load Byte and Zero with Update Indexed |
| [`norx`](../alu/norx.md) | `0x7c0000f8` | integer | NOR |
| [`stvebx`](../memory/stvebx.md) | `0x7c00010e` | memory | Store Vector Element Byte Indexed |
| [`mtmsr`](../control/mtmsr.md) | `0x7c000124` | control | Move to Machine State Register |
| [`stdx`](../memory/std.md) | `0x7c00012a` | memory | Store Doubleword Indexed |
| [`stwcx`](../memory/stwcx.md) | `0x7c00012d` | memory | Store Word Conditional Indexed |
| [`stwx`](../memory/stw.md) | `0x7c00012e` | memory | Store Word Indexed |
| [`stvehx`](../memory/stvehx.md) | `0x7c00014e` | memory | Store Vector Element Half Word Indexed |
| [`mtmsrd`](../control/mtmsrd.md) | `0x7c000164` | control | Move to Machine State Register Doubleword |
| [`stdux`](../memory/std.md) | `0x7c00016a` | memory | Store Doubleword with Update Indexed |
| [`stwux`](../memory/stw.md) | `0x7c00016e` | memory | Store Word with Update Indexed |
| [`stvewx`](../memory/stvewx.md) | `0x7c00018e` | memory | Store Vector Element Word Indexed |
| [`stdcx`](../memory/stdcx.md) | `0x7c0001ad` | memory | Store Doubleword Conditional Indexed |
| [`stbx`](../memory/stb.md) | `0x7c0001ae` | memory | Store Byte Indexed |
| [`stvx`](../memory/stvx.md) | `0x7c0001ce` | memory | Store Vector Indexed |
| [`dcbtst`](../memory/dcbtst.md) | `0x7c0001ec` | memory | Data Cache Block Touch for Store |
| [`stbux`](../memory/stb.md) | `0x7c0001ee` | memory | Store Byte with Update Indexed |
| [`dcbt`](../memory/dcbt.md) | `0x7c00022c` | memory | Data Cache Block Touch |
| [`lhzx`](../memory/lhz.md) | `0x7c00022e` | memory | Load Half Word and Zero Indexed |
| [`eqvx`](../alu/eqvx.md) | `0x7c000238` | integer | Equivalent |
| [`lhzux`](../memory/lhz.md) | `0x7c00026e` | memory | Load Half Word and Zero with Update Indexed |
| [`xorx`](../alu/xorx.md) | `0x7c000278` | integer | XOR |
| [`lwax`](../memory/lwa.md) | `0x7c0002aa` | memory | Load Word Algebraic Indexed |
| [`lhax`](../memory/lha.md) | `0x7c0002ae` | memory | Load Half Word Algebraic Indexed |
| [`lvxl`](../memory/lvxl.md) | `0x7c0002ce` | memory | Load Vector Indexed LRU |
| [`lwaux`](../memory/lwa.md) | `0x7c0002ea` | memory | Load Word Algebraic with Update Indexed |
| [`lhaux`](../memory/lha.md) | `0x7c0002ee` | memory | Load Half Word Algebraic with Update Indexed |
| [`sthx`](../memory/sth.md) | `0x7c00032e` | memory | Store Half Word Indexed |
| [`orcx`](../alu/orcx.md) | `0x7c000338` | integer | OR with Complement |
| [`sthux`](../memory/sth.md) | `0x7c00036e` | memory | Store Half Word with Update Indexed |
| [`orx`](../alu/orx.md) | `0x7c000378` | integer | OR |
| [`dcbi`](../memory/dcbi.md) | `0x7c0003ac` | memory | Data Cache Block Invalidate |
| [`nandx`](../alu/nandx.md) | `0x7c0003b8` | integer | NAND |
| [`stvxl`](../memory/stvxl.md) | `0x7c0003ce` | memory | Store Vector Indexed LRU |
| [`mcrxr`](../control/mcrxr.md) | `0x7c000400` | control | Move to Condition Register from XER |
| [`lvlx`](../memory/lvlx.md) | `0x7c00040e` | memory | Load Vector Left Indexed |
| [`ldbrx`](../memory/ldbrx.md) | `0x7c000428` | memory | Load Doubleword Byte-Reverse Indexed |
| [`lswx`](../memory/lswx.md) | `0x7c00042a` | memory | Load String Word Indexed |
| [`lwbrx`](../memory/lwbrx.md) | `0x7c00042c` | memory | Load Word Byte-Reverse Indexed |
| [`lfsx`](../memory/lfs.md) | `0x7c00042e` | memory | Load Floating-Point Single Indexed |
| [`srwx`](../alu/srwx.md) | `0x7c000430` | integer | Shift Right Word |
| [`srdx`](../alu/srdx.md) | `0x7c000436` | integer | Shift Right Doubleword |
| [`lvrx`](../memory/lvrx.md) | `0x7c00044e` | memory | Load Vector Right Indexed |
| [`lfsux`](../memory/lfs.md) | `0x7c00046e` | memory | Load Floating-Point Single with Update Indexed |
| [`lswi`](../memory/lswi.md) | `0x7c0004aa` | memory | Load String Word Immediate |
| [`sync`](../alu/sync.md) | `0x7c0004ac` | integer | Synchronize |
| [`lfdx`](../memory/lfd.md) | `0x7c0004ae` | memory | Load Floating-Point Double Indexed |
| [`lfdux`](../memory/lfd.md) | `0x7c0004ee` | memory | Load Floating-Point Double with Update Indexed |
| [`stvlx`](../memory/stvlx.md) | `0x7c00050e` | memory | Store Vector Left Indexed |
| [`stdbrx`](../memory/stdbrx.md) | `0x7c000528` | memory | Store Doubleword Byte-Reverse Indexed |
| [`stswx`](../memory/stswx.md) | `0x7c00052a` | memory | Store String Word Indexed |
| [`stwbrx`](../memory/stwbrx.md) | `0x7c00052c` | memory | Store Word Byte-Reverse Indexed |
| [`stfsx`](../memory/stfs.md) | `0x7c00052e` | memory | Store Floating-Point Single Indexed |
| [`stvrx`](../memory/stvrx.md) | `0x7c00054e` | memory | Store Vector Right Indexed |
| [`stfsux`](../memory/stfs.md) | `0x7c00056e` | memory | Store Floating-Point Single with Update Indexed |
| [`stswi`](../memory/stswi.md) | `0x7c0005aa` | memory | Store String Word Immediate |
| [`stfdx`](../memory/stfd.md) | `0x7c0005ae` | memory | Store Floating-Point Double Indexed |
| [`stfdux`](../memory/stfd.md) | `0x7c0005ee` | memory | Store Floating-Point Double with Update Indexed |
| [`lvlxl`](../memory/lvlxl.md) | `0x7c00060e` | memory | Load Vector Left Indexed LRU |
| [`lhbrx`](../memory/lhbrx.md) | `0x7c00062c` | memory | Load Half Word Byte-Reverse Indexed |
| [`srawx`](../alu/srawx.md) | `0x7c000630` | integer | Shift Right Algebraic Word |
| [`sradx`](../alu/sradx.md) | `0x7c000634` | integer | Shift Right Algebraic Doubleword |
| [`lvrxl`](../memory/lvrxl.md) | `0x7c00064e` | memory | Load Vector Right Indexed LRU |
| [`srawix`](../alu/srawix.md) | `0x7c000670` | integer | Shift Right Algebraic Word Immediate |
| [`eieio`](../alu/eieio.md) | `0x7c0006ac` | integer | Enforce In-Order Execution of I/O |
| [`stvlxl`](../memory/stvlxl.md) | `0x7c00070e` | memory | Store Vector Left Indexed LRU |
| [`sthbrx`](../memory/sthbrx.md) | `0x7c00072c` | memory | Store Half Word Byte-Reverse Indexed |
| [`extshx`](../alu/extshx.md) | `0x7c000734` | integer | Extend Sign Half Word |
| [`stvrxl`](../memory/stvrxl.md) | `0x7c00074e` | memory | Store Vector Right Indexed LRU |
| [`extsbx`](../alu/extsbx.md) | `0x7c000774` | integer | Extend Sign Byte |
| [`icbi`](../memory/icbi.md) | `0x7c0007ac` | memory | Instruction Cache Block Invalidate |
| [`stfiwx`](../memory/stfiwx.md) | `0x7c0007ae` | memory | Store Floating-Point as Integer Word Indexed |
| [`extswx`](../alu/extswx.md) | `0x7c0007b4` | integer | Extend Sign Word |
| [`fcmpu`](../fpu/fcmpu.md) | `0xfc000000` | fpu | Floating Compare Unordered |
| [`frspx`](../fpu/frspx.md) | `0xfc000018` | fpu | Floating Round to Single |
| [`fctiwx`](../fpu/fctiwx.md) | `0xfc00001c` | fpu | Floating Convert to Integer Word |
| [`fctiwzx`](../fpu/fctiwzx.md) | `0xfc00001e` | fpu | Floating Convert to Integer Word with Round Toward Zero |
| [`fcmpo`](../fpu/fcmpo.md) | `0xfc000040` | fpu | Floating Compare Ordered |
| [`mtfsb1x`](../control/mtfsb1x.md) | `0xfc00004c` | control | Move to FPSCR Bit 1 |
| [`fnegx`](../fpu/fnegx.md) | `0xfc000050` | fpu | Floating Negate |
| [`mcrfs`](../control/mcrfs.md) | `0xfc000080` | control | Move to Condition Register from FPSCR |
| [`mtfsb0x`](../control/mtfsb0x.md) | `0xfc00008c` | control | Move to FPSCR Bit 0 |
| [`fmrx`](../fpu/fmrx.md) | `0xfc000090` | fpu | Floating Move Register |
| [`mtfsfix`](../control/mtfsfix.md) | `0xfc00010c` | control | Move to FPSCR Field Immediate |
| [`fnabsx`](../fpu/fnabsx.md) | `0xfc000110` | fpu | Floating Negative Absolute Value |
| [`fabsx`](../fpu/fabsx.md) | `0xfc000210` | fpu | Floating Absolute Value |
| [`mffsx`](../control/mffsx.md) | `0xfc00048e` | control | Move from FPSCR |
| [`fctidx`](../fpu/fctidx.md) | `0xfc00065c` | fpu | Floating Convert to Integer Doubleword |
| [`fctidzx`](../fpu/fctidzx.md) | `0xfc00065e` | fpu | Floating Convert to Integer Doubleword with Round Toward Zero |
| [`fcfidx`](../fpu/fcfidx.md) | `0xfc00069c` | fpu | Floating Convert From Integer Doubleword |
<!-- GENERATED: END -->
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