ef93a4fa14
Source changes (dormant parity infra, retained from iterate 2.AI/2.AO): - xenia-kernel/exports.rs: nt_create_event manual_reset polarity + related event wiring - xenia-gpu/mmio_region.rs: D1MODE_VBLANK_VLINE_STATUS hardcode parity Also lands the audit-runs/ analysis notes (.md/.txt/.json digests) for the iterate 2.x VSync/0x10e8/0x1004 wedge investigation. Raw trace dumps (.jsonl/.gz/.csv/.stdout) and agent worktrees (.claude/) are gitignored as regenerable local artifacts — see memory + HANDOFF for the running findings. Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
87 lines
4.1 KiB
Markdown
87 lines
4.1 KiB
Markdown
# Phase C+23 re-validation (2026-05-18)
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## Protocol followed
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Cold-vs-cold per reading-error #31 + #32 + #33 + #34.
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1. ✓ Backed up both canary cache locations
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(`xenia-canary/build-cross/bin/Windows/Debug/cache/` and
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`~/.local/share/Xenia/cache/`) to tarballs in
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`xenia-rs/audit-runs/phase-c23-keWait-timeout-encoding/`.
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2. ✓ Wiped both canary caches + ours's
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(`~/.local/share/xenia-rs/cache/` + `/tmp/xrs-cache-c23-*`).
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3. ✓ Cold-ran ours (50M instructions) against the `.iso`
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path — NOT the loose `default.xex` (per #34).
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4. ✓ Cold-ran canary with phase_a_event_log_path set, killed after
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~95s timeout, with `--mute=true`.
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5. ✓ Truncated canary log to first 250k events for tid=6 / 20k for
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sisters (using existing C+19 truncate.py).
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6. ✓ Ran `diff_events.py` with full tid map
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`6=1,7=2,4=11,12=7,14=9,15=10`.
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7. ✓ Restored both canary cache backups.
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8. ✓ Reverted canary config (`phase_a_event_log_path` back to `""`).
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## Determinism check
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3 cold ours runs against `.iso`, det-fields-only MD5:
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| run | digest |
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|-----|-------------------------------------|
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| 1 | 23cf4c4cbf61a577caa4118ab2308ba6 |
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| 2 | 23cf4c4cbf61a577caa4118ab2308ba6 |
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| 3 | 23cf4c4cbf61a577caa4118ab2308ba6 |
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PASS — bit-stable. Replaces C+22's `e1dfcb1559f987b35012a7f2dc6d93f5`
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baseline (digest moved due to addis behavioral change).
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## Phase B image hash
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`image_canonical_sha256 = ea8d160e9369328a5b922258a92113efb8d7
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ce3e1a5c12cc521e375985c91c18` — UNCHANGED. The image-loading path
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is unaffected.
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## Gate matrix
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| gate | result |
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|---------------------------------------------|--------------------------------|
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| Engine source change minimal | PASS (~25 LOC, 1 file) |
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| CPU tests (xenia-cpu) — pre vs post | 288 → 291 (3 new, 0 regressions) |
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| Kernel tests (xenia-kernel) | 204 unchanged (no regressions) |
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| Diff-tool source unchanged | PASS |
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| Phase A schema version 1 unchanged | PASS |
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| ours-cold byte-stable across 3 runs | PASS (digest unchanged) |
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| Main matched-prefix preserved at C+22 | PASS (104,607) |
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| Sister tid=12→7 advanced | PASS (3 → 4) |
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| Sister tid=4→11 / 7→2 / 14→9 / 15→10 | PASS (all preserved) |
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| Phase B image hash preserved | PASS (ea8d160e…) |
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| Canary caches restored | PASS |
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| Canary config restored | PASS |
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| Workspace build clean | PASS |
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| `--mute=true` used | PASS |
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| Renamed binary used (xrs-c23) | PASS |
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| Cold-vs-cold against `.iso` | PASS (per #34) |
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## What changed in the diff-tool report compared to C+22 baseline
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| metric | C+22 | C+23 | delta |
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|------------------------------|---------|---------|-------|
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| matched tid=6→1 | 104,607 | 104,607 | 0 |
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| matched tid=4→11 | 11 | 11 | 0 |
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| matched tid=7→2 | 32 | 32 | 0 |
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| matched tid=12→7 | 3 | **4** | **+1** |
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| matched tid=14→9 | 41 | 41 | 0 |
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| matched tid=15→10 | 16 | 16 | 0 |
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| ours-cold total events | 121,569 | 121,569 | 0 |
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| ours-cold det-fields digest | e1dfcb15… | 23cf4c4c… | NEW |
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| Phase B image hash | ea8d160e… | ea8d160e… | 0 |
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## Outcome
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- C+23 = LANDED. tid=12→7 chain advances +1 (3 → 4).
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- 5 LOC effective engine change (CPU interpreter `addis`).
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- 3 new regression tests in xenia-cpu (lib tests 288 → 291).
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- Determinism preserved. Phase B image hash preserved.
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- All other sister chains and main preserved.
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- New downstream divergence at idx=4 is C+22-class scheduler
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determinism (out of scope for this phase).
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