Sylpheed/tools/ppc-manual/control/mcrf.md

mcrf — Move Condition Register Field

Category: Control / CR / SPR · Form: XL · Opcode: 0x4c000000

Assembler Mnemonics

Mnemonic	XML entry	Flags	Description
mcrf	mcrf	—	Move Condition Register Field

Syntax

mcrf [CRFD], [CRFS]

Encoding

mcrf — form XL

• Opcode word: 0x4c000000
• Primary opcode (bits 0–5): 19
• Extended opcode: 0
• Synchronising: no

Bits	Field	Meaning
0–5	OPCD	primary opcode (19)
6–10	BT/BO	target / branch options
11–15	BA/BI	source A / CR bit to test
16–20	BB	source B
21–30	XO	extended opcode (10 bits)
31	LK	link flag

Operands

Field	Role	Description
CRFS	mcrf: read	CR source field.
CRFD	mcrf: write	CR destination field (crf, 0–7).

Register Effects

mcrf

• Reads (always): CRFS
• Reads (conditional): none
• Writes (always): CRFD
• Writes (conditional): none

Status-Register Effects

No condition-register or status-register effects.

Operation (pseudocode)

; No hand-written pseudocode for this instruction yet.
; The authoritative semantics are the Canary emitter snapshot under
; Implementation References; about half of Canary's emitters open
; with the PPC-style definition as a comment (`RD <- (RA) + (RB)`).
; Every side effect is also enumerated in the Register Effects and
; Status-Register Effects tables above.

C Translation Example

/* No hand-written C yet. Translate the Canary emitter snapshot   */
/* under Implementation References; its HIR maps directly:        */
/*   f.LoadGPR(n) / f.StoreGPR(n, v)  -> r[n] / r[n] = v          */
/*   f.LoadFPR / StoreFPR, f.LoadVR / StoreVR -> f[n], v[n]        */
/*   f.Load(ea, T), f.Store(ea, v) -> raw read / write; emitters   */
/*     wrap them in f.ByteSwap for the big-endian guest value      */
/*   f.UpdateCR(n, v)  -> CR field n from v's LOW 32 BITS vs 0     */
/*   f.LoadCA / f.StoreCA -> xer.CA;  f.StoreSAT -> vscr.SAT       */
/*   i.XO.RA, i.D.DS, ... -> the bit-fields listed under Operands  */
/* The Register Effects and Status-Register Effects tables above  */
/* enumerate every side effect a faithful translation must emit.  */

Implementation References

mcrf

• Canary XML: tools/ppc-instructions.xml — search for mnem="mcrf"
• Canary emitter: src/xenia/cpu/ppc/ppc_emit_control.cc:424
• Sylpheed opcode: crates/sylpheed-ppc/src/opcode.rs:167
• Sylpheed decoder: crates/sylpheed-ppc/src/decoder.rs:825

Canary emitter (frozen snapshot @ f21ebd49e9)

int InstrEmit_mcrf(PPCHIRBuilder& f, const InstrData& i) {
  // CR[4*bf:4*bf+3] <- CR[4*bfa:4*bfa+3]   bf=bo, bfa=bi
  // LoadCR/StoreCR bake the field position into the word and cannot cross it.
  uint32_t crfd = i.XL.BO >> 2;
  uint32_t crfs = i.XL.BI >> 2;
  for (uint32_t bit = 0; bit < 4; ++bit) {
    f.StoreCRField(crfd, bit, f.LoadCRField(crfs, bit));
  }
  return 0;
}

Special Cases & Edge Conditions

• Field-level (4-bit) move. Unlike the bit-level CR-logical family (crand, …, crxor), mcrf copies all four bits of a CR field (LT, GT, EQ, SO) in one instruction. CRFD and CRFS are 3-bit field indices (0..7), each naming a 4-bit slice of the 32-bit CR.
• No source-field clobber. The source field is read, not modified — mcrf 0, 1 copies CR1 into CR0 leaving CR1 intact.
• Same-field is a NOP. mcrf cr0, cr0 reads-then-writes the same field; Canary still emits the four bit copies but the architectural state is unchanged.
• Use case. Promote a non-default compare result into cr0 so a default-cr0 simplified branch (beq label) can consume it without spelling out cr1/cr2/etc. The alternative — crmove — would require four cror instructions to move all four bits.
• No CR0/XER side effects. Pure CR-field dataflow.
• Not synchronising. Reorderable.
• Canary exact match. Canary copies the field bit by bit (StoreCRField(crfd, bit, LoadCRField(crfs, bit)) for all four bits), matching PowerISA semantics exactly.

Related Instructions

• mfcr — read the entire 32-bit CR into a GPR.
• mtcrf — write selected CR fields from a GPR (uses an 8-bit field-mask).
• mcrxr — copy XER[SO..CA] into a CR field and clear them.
• mcrfs — copy an FPSCR field into a CR field.
• crand, crandc, creqv, crnand, crnor, cror, crorc, crxor — bit-level alternatives.
• bcx — typical consumer.

mcrf has no simplified mnemonics.

IBM Reference

• AIX 7.3 — mcrf (Move Condition Register Field)