Sylpheed/tools/ppc-manual/alu/subfzex.md

subfzex — Subtract From Zero Extended

Category: Integer ALU · Form: XO · Opcode: 0x7c000190

Assembler Mnemonics

Mnemonic	XML entry	Flags	Description
subfze	subfzex	—	Subtract From Zero Extended
subfzeo	subfzex	OE=1	Subtract From Zero Extended
subfze.	subfzex	Rc=1	Subtract From Zero Extended
subfzeo.	subfzex	OE=1, Rc=1	Subtract From Zero Extended

Syntax

subfze[OE][Rc] [RD], [RA]

Encoding

subfzex — form XO

• Opcode word: 0x7c000190
• Primary opcode (bits 0–5): 31
• Extended opcode: 200
• Synchronising: no

Bits	Field	Meaning
0–5	OPCD	primary opcode (31)
6–10	RT	destination GPR
11–15	RA	source A
16–20	RB	source B
21	OE	overflow-enable flag
22–30	XO	extended opcode (9 bits)
31	Rc	record-form flag

Operands

Field	Role	Description
RA	subfzex: read	Source GPR (r0–r31).
CA	subfzex: read; subfzex: write	XER[CA] carry bit. Read by add-with-carry/subtract-with-borrow instructions, written by carrying instructions.
RD	subfzex: write	Destination GPR.
CR	subfzex: write (conditional)	Condition-register update. When Rc=1, CR field 0 (or CR6 for vector compares, CR1 for FPU) is updated from the result.
OE	subfzex: write (conditional)	Overflow-enable bit. When 1, the instruction updates XER[OV] and stickies XER[SO] on signed overflow.

Register Effects

subfzex

• Reads (always): RA, CA
• Reads (conditional): none
• Writes (always): RD, CA
• Writes (conditional): CR, OE

Status-Register Effects

• subfzex: CR0 ← signed-compare(result, 0) with SO ← XER[SO], when Rc=1.; XER[OV] ← signed-overflow(result); XER[SO] stickies, when OE=1.; XER[CA] ← carry-out of the add / borrow-in of the subtract (always).

Operation (pseudocode)

; No hand-written pseudocode for this instruction yet.
; The authoritative semantics are the Canary emitter snapshot under
; Implementation References; about half of Canary's emitters open
; with the PPC-style definition as a comment (`RD <- (RA) + (RB)`).
; Every side effect is also enumerated in the Register Effects and
; Status-Register Effects tables above.

C Translation Example

/* No hand-written C yet. Translate the Canary emitter snapshot   */
/* under Implementation References; its HIR maps directly:        */
/*   f.LoadGPR(n) / f.StoreGPR(n, v)  -> r[n] / r[n] = v          */
/*   f.LoadFPR / StoreFPR, f.LoadVR / StoreVR -> f[n], v[n]        */
/*   f.Load(ea, T), f.Store(ea, v) -> raw read / write; emitters   */
/*     wrap them in f.ByteSwap for the big-endian guest value      */
/*   f.UpdateCR(n, v)  -> CR field n from v's LOW 32 BITS vs 0     */
/*   f.LoadCA / f.StoreCA -> xer.CA;  f.StoreSAT -> vscr.SAT       */
/*   i.XO.RA, i.D.DS, ... -> the bit-fields listed under Operands  */
/* The Register Effects and Status-Register Effects tables above  */
/* enumerate every side effect a faithful translation must emit.  */

Implementation References

subfzex

• Canary XML: tools/ppc-instructions.xml — search for mnem="subfzex"
• Canary emitter: src/xenia/cpu/ppc/ppc_emit_alu.cc:504
• Sylpheed opcode: crates/sylpheed-ppc/src/opcode.rs:286
• Sylpheed decoder: crates/sylpheed-ppc/src/decoder.rs:984

Canary emitter (frozen snapshot @ f21ebd49e9)

int InstrEmit_subfzex(PPCHIRBuilder& f, const InstrData& i) {
  // RT <- ¬(RA) + CA
  Value* not_ra = f.Not(f.LoadGPR(i.XO.RA));
  Value* v = f.AddWithCarry(not_ra, f.LoadZeroInt64(), f.LoadCA());
  f.StoreGPR(i.XO.RT, v);
  if (i.XO.OE) {
    XEINSTRNOTIMPLEMENTED();
    // e.update_xer_with_overflow_and_carry(b.CreateExtractValue(v, 1));
  } else {
    f.StoreCA(AddWithCarryDidCarry(f, not_ra, f.LoadZeroInt64(), f.LoadCA()));
  }
  if (i.XO.Rc) {
    f.UpdateCR(0, v);
  }
  return 0;
}

Special Cases & Edge Conditions

• RT ← ~RA + 0 + XER[CA] ≡ ~RA + CA. The subtract-side high-word terminator for a multi-word subtract chain. Implements 0 - (...) - borrow for the high word.
• RB field unused.
• Carry-out predicate. RT = ~RA + CA, which carries out only when ~RA is all ones and CA = 1: CA' = (RA == 0) && (CA != 0). (This page previously gave (~RA != 0) || CA, which is subfmex's predicate.) Canary evaluates it on the low word via AddWithCarryDidCarry(~RA, 0, CA).
• OE=1 should set XER[OV] on signed overflow; Canary's OE branch is XEINSTRNOTIMPLEMENTED() and does not store CA.
• 64-bit CR update on Xenon, 32-bit in Canary (f.UpdateCR(0, v)).
• XER[CA] must be initialised by an earlier carrying instruction.
• Common idiom: extracting XER[CA] as 0/-1. subfze rT, rN (where rN == 0) materialises XER[CA] to 0 or -1 (-1 = ~0 + CA = -1 + CA); pair with addzex for 0/1 instead.

Related Instructions

• subfmex — terminator with ~RA + (−1) + CA.
• subfex, subfcx — chain middle / seed.
• addzex — dual; produces 0/1 from CA.
• negx — subfze with RA = 0 and CA = 1 is functionally similar.

IBM Reference

• AIX 7.3 — subfze (Subtract From Zero Extended)