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chore(tools): adopt the PPC manual and a canary launcher that works anywhere
CONSOLIDATION.md Phase 6. Both lived untracked in the project root -- on one
disk, backed up by nothing.

  tools/ppc-manual/   393 files, 3.7 MB. 455 instructions, 350 family pages,
                      598 mnemonics resolvable through index.json, plus the
                      generator that produced them.
  tools/run-canary.sh the oracle launcher.

🔴 THE LAUNCHER WAS BROKEN IN TWO WAYS AND IS REWRITTEN, not copied:

  * it pointed at `xenia-rs/sylpheed.iso`, a SYMLINK. Wine cannot resolve one
    and says "path invalid", which reads as a corrupt image rather than a path
    problem -- it has cost a session before. It now points at the real file and
    warns if handed a symlink.
  * it hardcoded one machine's absolute paths, and named `xenia-rs`, which this
    consolidation retires. Now derived from the script's own location, with
    SYLPH_CANARY_BIN / SYLPH_ISO overrides and a check that each exists.

The standing constraints are in its header where someone will read them: one
emulator at a time, Canary runs MUTED, and never judge a crash or a hang from
a Bash-launched run -- a SIGKILL that looked like the binary was the editor's
process supervisor.

⚠️ The manual's GENERATOR reads the xenia-rs source tree, which is going away.
Its decoder now lives here as crates/sylpheed-ppc, so the generator must be
repointed before it is run again. Recorded in the README rather than left for
someone to discover; the manual's content is checked in and regenerates from
nothing implicitly.

Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
2026-09-13 21:18:00 +02:00

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mcrf — Move Condition Register Field

Category: Control / CR / SPR · Form: XL · Opcode: 0x4c000000

Assembler Mnemonics

Mnemonic XML entry Flags Description
mcrf mcrf Move Condition Register Field

Syntax

mcrf [CRFD], [CRFS]

Encoding

mcrf — form XL

  • Opcode word: 0x4c000000
  • Primary opcode (bits 05): 19
  • Extended opcode: 0
  • Synchronising: no
Bits Field Meaning
05 OPCD primary opcode (19)
610 BT/BO target / branch options
1115 BA/BI source A / CR bit to test
1620 BB source B
2130 XO extended opcode (10 bits)
31 LK link flag

Operands

Field Role Description
CRFS mcrf: read CR source field.
CRFD mcrf: write CR destination field (crf, 07).

Register Effects

mcrf

  • Reads (always): CRFS
  • Reads (conditional): none
  • Writes (always): CRFD
  • Writes (conditional): none

Status-Register Effects

No condition-register or status-register effects.

Operation (pseudocode)

; Pseudocode derives directly from the xenia-rs interpreter
; arm (see Implementation References). Operation semantics:
;   - Read source operands from the fields listed under Operands.
;   - Apply the arithmetic / logical / memory action described
;     in the Description field above.
;   - Write results to the destination register(s); update any
;     status bits enumerated under Status-Register Effects.
; Consult the IBM AIX reference link under IBM Reference for
; canonical PPC-style pseudocode where xenia's expression is
; terse.

C Translation Example

/* C translation: the xenia-rs interpreter arm below in           */
/* Implementation References is the authoritative semantic        */
/* snapshot. Translate it line-by-line:                            */
/*   - ctx.gpr[N]  -> r[N]       (or f[]/v[] for FPRs/VRs)        */
/*   - mem.read_u*/write_u* -> mem_read_u*_be / mem_write_u*_be   */
/*   - ctx.update_cr_signed(fld, v) -> update_cr_signed(fld, v)   */
/*   - ctx.xer_ca / xer_ov / xer_so -> xer.CA / xer.OV / xer.SO   */
/* The Register Effects and Status-Register Effects tables above  */
/* enumerate every side effect a faithful translation must emit.  */

Implementation References

mcrf

xenia-rs interpreter body (frozen snapshot)
        PpcOpcode::mcrf => {
            ctx.cr[instr.crfd()] = ctx.cr[instr.crfs()];
            ctx.pc += 4;
        }

Special Cases & Edge Conditions

  • Field-level (4-bit) move. Unlike the bit-level CR-logical family (crand, …, crxor), mcrf copies all four bits of a CR field (LT, GT, EQ, SO) in one instruction. CRFD and CRFS are 3-bit field indices (0..7), each naming a 4-bit slice of the 32-bit CR.
  • No source-field clobber. The source field is read, not modified — mcrf 0, 1 copies CR1 into CR0 leaving CR1 intact.
  • Same-field is a NOP. mcrf cr0, cr0 reads-then-writes the same field; xenia's interpreter still does the assignment but the architectural state is unchanged.
  • Use case. Promote a non-default compare result into cr0 so a default-cr0 simplified branch (beq label) can consume it without spelling out cr1/cr2/etc. The alternative — crmove — would require four cror instructions to move all four bits.
  • No CR0/XER side effects. Pure CR-field dataflow.
  • Not synchronising. Reorderable.
  • xenia exact match. xenia-rs models the CR as an array of eight 4-bit fields, so mcrf is a single struct copy (ctx.cr[crfd] = ctx.cr[crfs]). Matches PowerISA semantics exactly.
  • mfcr — read the entire 32-bit CR into a GPR.
  • mtcrf — write selected CR fields from a GPR (uses an 8-bit field-mask).
  • mcrxr — copy XER[SO..CA] into a CR field and clear them.
  • mcrfs — copy an FPSCR field into a CR field.
  • crand, crandc, creqv, crnand, crnor, cror, crorc, crxor — bit-level alternatives.
  • bcx — typical consumer.

mcrf has no simplified mnemonics.

IBM Reference