Files
Sylpheed/tools/ppc-manual/categories/vmx.md
sim 9bfe96e44d fix(ppc-manual): 543 dead links, from two generator bugs and wrong relative paths
- Category pages linked each family as `<slug>.md`, relative to categories/,
  where no family page lives. They now link `../<category>/<slug>.md`.
- Form pages linked a member into its *own* category directory, so every
  VMX128 sibling (`vsldoi128`) pointed at vmx128/ although its family page is
  under vmx/. They now link into the family's directory.
- Hand-written "Related" and sibling mentions linked other categories' pages
  as if they were in the same directory. 109 are retargeted through the page
  index; 29 that pointed a family page at itself (`vrefp128` on vrefp.md) and
  6 naming instructions the manual has no page for are plain text now.

Regenerated at the existing Canary pin (f21ebd49e): upstream has moved on, and
re-pinning belongs in its own change. The generator reports 0 family pages
changed and is idempotent; the only dead links left are TEMPLATE.md's
placeholders.

Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
2026-09-16 22:37:12 +02:00

14 KiB
Raw Blame History

VMX (Altivec)

128-bit SIMD over 32 registers V0V31. Integer/float arithmetic, logical, compare, permute/merge, pack/unpack, saturation helpers.

144 families · 193 XML entries.

Family Form Description Members
lvsl X Load Vector for Shift Left Indexed lvsl, lvsl128
lvsr X Load Vector for Shift Right Indexed lvsr, lvsr128
vaddcuw VX Vector Add Carryout Unsigned Word vaddcuw
vaddfp VX Vector Add Floating Point vaddfp, vaddfp128
vaddsbs VX Vector Add Signed Byte Saturate vaddsbs
vaddshs VX Vector Add Signed Half Word Saturate vaddshs
vaddsws VX Vector Add Signed Word Saturate vaddsws
vaddubm VX Vector Add Unsigned Byte Modulo vaddubm
vaddubs VX Vector Add Unsigned Byte Saturate vaddubs
vadduhm VX Vector Add Unsigned Half Word Modulo vadduhm
vadduhs VX Vector Add Unsigned Half Word Saturate vadduhs
vadduwm VX Vector Add Unsigned Word Modulo vadduwm
vadduws VX Vector Add Unsigned Word Saturate vadduws
vand VX Vector Logical AND vand, vand128
vandc VX Vector Logical AND with Complement vandc, vandc128
vavgsb VX Vector Average Signed Byte vavgsb
vavgsh VX Vector Average Signed Half Word vavgsh
vavgsw VX Vector Average Signed Word vavgsw
vavgub VX Vector Average Unsigned Byte vavgub
vavguh VX Vector Average Unsigned Half Word vavguh
vavguw VX Vector Average Unsigned Word vavguw
vcfsx VX Vector Convert from Signed Fixed-Point Word vcfsx
vcfux VX Vector Convert from Unsigned Fixed-Point Word vcfux
vcmpbfp VC Vector Compare Bounds Floating Point vcmpbfp, vcmpbfp128
vcmpeqfp VC Vector Compare Equal-to Floating Point vcmpeqfp, vcmpeqfp128
vcmpequb VC Vector Compare Equal-to Unsigned Byte vcmpequb
vcmpequh VC Vector Compare Equal-to Unsigned Half Word vcmpequh
vcmpequw VC Vector Compare Equal-to Unsigned Word vcmpequw, vcmpequw128
vcmpgefp VC Vector Compare Greater-Than-or-Equal-to Floating Point vcmpgefp, vcmpgefp128
vcmpgtfp VC Vector Compare Greater-Than Floating Point vcmpgtfp, vcmpgtfp128
vcmpgtsb VC Vector Compare Greater-Than Signed Byte vcmpgtsb
vcmpgtsh VC Vector Compare Greater-Than Signed Half Word vcmpgtsh
vcmpgtsw VC Vector Compare Greater-Than Signed Word vcmpgtsw
vcmpgtub VC Vector Compare Greater-Than Unsigned Byte vcmpgtub
vcmpgtuh VC Vector Compare Greater-Than Unsigned Half Word vcmpgtuh
vcmpgtuw VC Vector Compare Greater-Than Unsigned Word vcmpgtuw
vctsxs VX Vector Convert to Signed Fixed-Point Word Saturate vctsxs
vctuxs VX Vector Convert to Unsigned Fixed-Point Word Saturate vctuxs
vexptefp VX Vector 2 Raised to the Exponent Estimate Floating Point vexptefp, vexptefp128
vlogefp VX Vector Log2 Estimate Floating Point vlogefp, vlogefp128
vmaddfp VA Vector Multiply-Add Floating Point vmaddfp, vmaddfp128
vmaxfp VX Vector Maximum Floating Point vmaxfp, vmaxfp128
vmaxsb VX Vector Maximum Signed Byte vmaxsb
vmaxsh VX Vector Maximum Signed Half Word vmaxsh
vmaxsw VX Vector Maximum Signed Word vmaxsw
vmaxub VX Vector Maximum Unsigned Byte vmaxub
vmaxuh VX Vector Maximum Unsigned Half Word vmaxuh
vmaxuw VX Vector Maximum Unsigned Word vmaxuw
vmhaddshs VA Vector Multiply-High and Add Signed Signed Half Word Saturate vmhaddshs
vmhraddshs VA Vector Multiply-High Round and Add Signed Signed Half Word Saturate vmhraddshs
vminfp VX Vector Minimum Floating Point vminfp, vminfp128
vminsb VX Vector Minimum Signed Byte vminsb
vminsh VX Vector Minimum Signed Half Word vminsh
vminsw VX Vector Minimum Signed Word vminsw
vminub VX Vector Minimum Unsigned Byte vminub
vminuh VX Vector Minimum Unsigned Half Word vminuh
vminuw VX Vector Minimum Unsigned Word vminuw
vmladduhm VA Vector Multiply-Low and Add Unsigned Half Word Modulo vmladduhm
vmrghb VX Vector Merge High Byte vmrghb
vmrghh VX Vector Merge High Half Word vmrghh
vmrghw VX Vector Merge High Word vmrghw, vmrghw128
vmrglb VX Vector Merge Low Byte vmrglb
vmrglh VX Vector Merge Low Half Word vmrglh
vmrglw VX Vector Merge Low Word vmrglw, vmrglw128
vmsummbm VA Vector Multiply-Sum Mixed-Sign Byte Modulo vmsummbm
vmsumshm VA Vector Multiply-Sum Signed Half Word Modulo vmsumshm
vmsumshs VA Vector Multiply-Sum Signed Half Word Saturate vmsumshs
vmsumubm VA Vector Multiply-Sum Unsigned Byte Modulo vmsumubm
vmsumuhm VA Vector Multiply-Sum Unsigned Half Word Modulo vmsumuhm
vmsumuhs VA Vector Multiply-Sum Unsigned Half Word Saturate vmsumuhs
vmulesb VX Vector Multiply Even Signed Byte vmulesb
vmulesh VX Vector Multiply Even Signed Half Word vmulesh
vmuleub VX Vector Multiply Even Unsigned Byte vmuleub
vmuleuh VX Vector Multiply Even Unsigned Half Word vmuleuh
vmulosb VX Vector Multiply Odd Signed Byte vmulosb
vmulosh VX Vector Multiply Odd Signed Half Word vmulosh
vmuloub VX Vector Multiply Odd Unsigned Byte vmuloub
vmulouh VX Vector Multiply Odd Unsigned Half Word vmulouh
vnmsubfp VA Vector Negative Multiply-Subtract Floating Point vnmsubfp, vnmsubfp128
vnor VX Vector Logical NOR vnor, vnor128
vor VX Vector Logical OR vor, vor128
vperm VA Vector Permute vperm, vperm128
vpkpx VX Vector Pack Pixel vpkpx
vpkshss VX Vector Pack Signed Half Word Signed Saturate vpkshss, vpkshss128
vpkshus VX Vector Pack Signed Half Word Unsigned Saturate vpkshus, vpkshus128
vpkswss VX Vector Pack Signed Word Signed Saturate vpkswss, vpkswss128
vpkswus VX Vector Pack Signed Word Unsigned Saturate vpkswus, vpkswus128
vpkuhum VX Vector Pack Unsigned Half Word Unsigned Modulo vpkuhum, vpkuhum128
vpkuhus VX Vector Pack Unsigned Half Word Unsigned Saturate vpkuhus, vpkuhus128
vpkuwum VX Vector Pack Unsigned Word Unsigned Modulo vpkuwum, vpkuwum128
vpkuwus VX Vector Pack Unsigned Word Unsigned Saturate vpkuwus, vpkuwus128
vrefp VX Vector Reciprocal Estimate Floating Point vrefp, vrefp128
vrfim VX Vector Round to Floating-Point Integer toward -Infinity vrfim, vrfim128
vrfin VX Vector Round to Floating-Point Integer Nearest vrfin, vrfin128
vrfip VX Vector Round to Floating-Point Integer toward +Infinity vrfip, vrfip128
vrfiz VX Vector Round to Floating-Point Integer toward Zero vrfiz, vrfiz128
vrlb VX Vector Rotate Left Integer Byte vrlb
vrlh VX Vector Rotate Left Integer Half Word vrlh
vrlw VX Vector Rotate Left Integer Word vrlw, vrlw128
vrsqrtefp VX Vector Reciprocal Square Root Estimate Floating Point vrsqrtefp, vrsqrtefp128
vsel VA Vector Conditional Select vsel, vsel128
vsl VX Vector Shift Left vsl
vslb VX Vector Shift Left Integer Byte vslb
vsldoi VA Vector Shift Left Double by Octet Immediate vsldoi, vsldoi128
vslh VX Vector Shift Left Integer Half Word vslh
vslo VX Vector Shift Left by Octet vslo, vslo128
vslw VX Vector Shift Left Integer Word vslw, vslw128
vspltb VX Vector Splat Byte vspltb
vsplth VX Vector Splat Half Word vsplth
vspltisb VX Vector Splat Immediate Signed Byte vspltisb
vspltish VX Vector Splat Immediate Signed Half Word vspltish
vspltisw VX Vector Splat Immediate Signed Word vspltisw, vspltisw128
vspltw VX Vector Splat Word vspltw, vspltw128
vsr VX Vector Shift Right vsr
vsrab VX Vector Shift Right Algebraic Byte vsrab
vsrah VX Vector Shift Right Algebraic Half Word vsrah
vsraw VX Vector Shift Right Algebraic Word vsraw, vsraw128
vsrb VX Vector Shift Right Byte vsrb
vsrh VX Vector Shift Right Half Word vsrh
vsro VX Vector Shift Right Octet vsro, vsro128
vsrw VX Vector Shift Right Word vsrw, vsrw128
vsubcuw VX Vector Subtract Carryout Unsigned Word vsubcuw
vsubfp VX Vector Subtract Floating Point vsubfp, vsubfp128
vsubsbs VX Vector Subtract Signed Byte Saturate vsubsbs
vsubshs VX Vector Subtract Signed Half Word Saturate vsubshs
vsubsws VX Vector Subtract Signed Word Saturate vsubsws
vsububm VX Vector Subtract Unsigned Byte Modulo vsububm
vsububs VX Vector Subtract Unsigned Byte Saturate vsububs
vsubuhm VX Vector Subtract Unsigned Half Word Modulo vsubuhm
vsubuhs VX Vector Subtract Unsigned Half Word Saturate vsubuhs
vsubuwm VX Vector Subtract Unsigned Word Modulo vsubuwm
vsubuws VX Vector Subtract Unsigned Word Saturate vsubuws
vsum2sws VX Vector Sum Across Partial (1/2) Signed Word Saturate vsum2sws
vsum4sbs VX Vector Sum Across Partial (1/4) Signed Byte Saturate vsum4sbs
vsum4shs VX Vector Sum Across Partial (1/4) Signed Half Word Saturate vsum4shs
vsum4ubs VX Vector Sum Across Partial (1/4) Unsigned Byte Saturate vsum4ubs
vsumsws VX Vector Sum Across Signed Word Saturate vsumsws
vupkhpx VX Vector Unpack High Pixel vupkhpx
vupkhsb VX Vector Unpack High Signed Byte vupkhsb, vupkhsb128
vupkhsh VX Vector Unpack High Signed Half Word vupkhsh
vupklpx VX Vector Unpack Low Pixel vupklpx
vupklsb VX Vector Unpack Low Signed Byte vupklsb, vupklsb128
vupklsh VX Vector Unpack Low Signed Half Word vupklsh
vxor VX Vector Logical XOR vxor, vxor128