fabi/Xenia-Canary
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

[Testing] Add a lot more missing instruction tests

Browse Source
This commit is contained in:
Herman S.
2025-10-19 13:42:59 +09:00
parent 9e9b733dfb
commit 1b25574986
166 changed files with 5621 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

89
src/xenia/cpu/ppc/testing/instr_divdx.s Normal file
View File

@@ -0,0 +1,89 @@
test_divdx_1:
#_ REGISTER_IN r4 0x0000000000001000
#_ REGISTER_IN r5 0x0000000000000010
divd. r3, r4, r5
mfcr r12
blr
#_ REGISTER_OUT r3 0x0000000000000100
#_ REGISTER_OUT r12 0x0000000040000000
test_divdx_1_constant:
li r4, 0x1000
li r5, 0x10
divd. r3, r4, r5
mfcr r12
blr
#_ REGISTER_OUT r3 0x0000000000000100
#_ REGISTER_OUT r12 0x0000000040000000
test_divdx_negative:
#_ REGISTER_IN r4 0xFFFFFFFFFFFFF000
#_ REGISTER_IN r5 0x0000000000000010
divd. r3, r4, r5
mfcr r12
blr
#_ REGISTER_OUT r3 0xFFFFFFFFFFFFFF00
#_ REGISTER_OUT r12 0x0000000080000000
test_divdx_by_zero:
#_ REGISTER_IN r4 0x0000000000001000
#_ REGISTER_IN r5 0x0000000000000000
divd. r3, r4, r5
mfcr r12
blr
#_ REGISTER_OUT r3 0x0000000000000000
#_ REGISTER_OUT r12 0x0000000020000000
test_divdux_1:
#_ REGISTER_IN r4 0x0000000000001000
#_ REGISTER_IN r5 0x0000000000000010
divdu. r3, r4, r5
mfcr r12
blr
#_ REGISTER_OUT r3 0x0000000000000100
#_ REGISTER_OUT r12 0x0000000040000000
test_divdux_large:
#_ REGISTER_IN r4 0xFFFFFFFFFFFFFFFF
#_ REGISTER_IN r5 0x0000000000000002
divdu. r3, r4, r5
mfcr r12
blr
#_ REGISTER_OUT r3 0x7FFFFFFFFFFFFFFF
#_ REGISTER_OUT r12 0x0000000080000000
test_divwx_1:
#_ REGISTER_IN r4 0x0000000000001000
#_ REGISTER_IN r5 0x0000000000000010
divw. r3, r4, r5
mfcr r12
blr
#_ REGISTER_OUT r3 0x0000000000000100
#_ REGISTER_OUT r12 0x0000000040000000
test_divwx_negative:
#_ REGISTER_IN r4 0x00000000FFFFF000
#_ REGISTER_IN r5 0x0000000000000010
divw. r3, r4, r5
mfcr r12
blr
#_ REGISTER_OUT r3 0x00000000FFFFFF00
#_ REGISTER_OUT r12 0x0000000080000000
test_divwux_1:
#_ REGISTER_IN r4 0x0000000000001000
#_ REGISTER_IN r5 0x0000000000000010
divwu. r3, r4, r5
mfcr r12
blr
#_ REGISTER_OUT r3 0x0000000000000100
#_ REGISTER_OUT r12 0x0000000040000000
test_divwux_large:
#_ REGISTER_IN r4 0x00000000FFFFFFFF
#_ REGISTER_IN r5 0x0000000000000002
divwu. r3, r4, r5
mfcr r12
blr
#_ REGISTER_OUT r3 0x000000007FFFFFFF
#_ REGISTER_OUT r12 0x0000000040000000