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[Testing] Add a lot more missing instruction tests

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Herman S.
2025-10-19 13:42:59 +09:00
parent 9e9b733dfb
commit 1b25574986
166 changed files with 5621 additions and 0 deletions
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src/xenia/cpu/ppc/testing/instr_stvewx128.s Normal file
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test_stvewx128_1:
# Store vector element word 128 - stores 4 bytes at aligned address
#_ MEMORY_IN 0x0000000010001000 [CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC]
#_ REGISTER_IN r4 0x0000000010001000
#_ REGISTER_IN v3 [01020304, 05060708, 090A0B0C, 0D0E0F10]
stvewx128 v3, r0, r4
blr
#_ REGISTER_OUT r4 0x0000000010001000
#_ REGISTER_OUT v3 [01020304, 05060708, 090A0B0C, 0D0E0F10]
#_ MEMORY_OUT 10001000 01020304
test_stvewx128_2:
# Store to second element position
#_ MEMORY_IN 0x0000000010001000 [CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC]
#_ REGISTER_IN r4 0x0000000010001004
#_ REGISTER_IN v3 [01020304, 05060708, 090A0B0C, 0D0E0F10]
stvewx128 v3, r0, r4
blr
#_ REGISTER_OUT r4 0x0000000010001004
#_ REGISTER_OUT v3 [01020304, 05060708, 090A0B0C, 0D0E0F10]
#_ MEMORY_OUT 10001004 05060708
test_stvewx128_3:
# Store to third element position
#_ MEMORY_IN 0x0000000010001000 [CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC]
#_ REGISTER_IN r4 0x0000000010001008
#_ REGISTER_IN v3 [01020304, 05060708, 090A0B0C, 0D0E0F10]
stvewx128 v3, r0, r4
blr
#_ REGISTER_OUT r4 0x0000000010001008
#_ REGISTER_OUT v3 [01020304, 05060708, 090A0B0C, 0D0E0F10]
#_ MEMORY_OUT 10001008 090A0B0C
test_stvewx128_4:
# Store to fourth element position
#_ MEMORY_IN 0x0000000010001000 [CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC]
#_ REGISTER_IN r4 0x000000001000100C
#_ REGISTER_IN v3 [01020304, 05060708, 090A0B0C, 0D0E0F10]
stvewx128 v3, r0, r4
blr
#_ REGISTER_OUT r4 0x000000001000100C
#_ REGISTER_OUT v3 [01020304, 05060708, 090A0B0C, 0D0E0F10]
#_ MEMORY_OUT 1000100C 0D0E0F10