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[Testing] Add a lot more missing instruction tests

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Herman S.
2025-10-19 13:42:59 +09:00
parent 9e9b733dfb
commit 1b25574986
166 changed files with 5621 additions and 0 deletions
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35
src/xenia/cpu/ppc/testing/instr_stwbrx.s Normal file
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test_stwbrx_1:
#_ MEMORY_IN 0x0000000010001000 [00, 00, 00, 00, 00, 00, 00, 00]
#_ REGISTER_IN r3 0x0000000012345678
#_ REGISTER_IN r4 0x0000000010001000
#_ REGISTER_IN r5 0
stwbrx r3, r4, r5
blr
#_ REGISTER_OUT r3 0x0000000012345678
#_ REGISTER_OUT r4 0x0000000010001000
#_ REGISTER_OUT r5 0
#_ MEMORY_OUT 10001000 78563412
test_stwbrx_2:
#_ MEMORY_IN 0x0000000010001000 [00, 00, 00, 00, 00, 00, 00, 00]
#_ REGISTER_IN r3 0x00000000ABCDEF01
#_ REGISTER_IN r4 0x0000000010001000
#_ REGISTER_IN r5 4
stwbrx r3, r4, r5
blr
#_ REGISTER_OUT r3 0x00000000ABCDEF01
#_ REGISTER_OUT r4 0x0000000010001000
#_ REGISTER_OUT r5 4
#_ MEMORY_OUT 10001004 01EFCDAB
test_stwbrx_3:
#_ MEMORY_IN 0x0000000010001000 [00, 00, 00, 00, 00, 00, 00, 00]
#_ REGISTER_IN r3 0x00000000FFFEFDFC
#_ REGISTER_IN r4 0
#_ REGISTER_IN r5 0x0000000010001000
stwbrx r3, r4, r5
blr
#_ REGISTER_OUT r3 0x00000000FFFEFDFC
#_ REGISTER_OUT r4 0
#_ REGISTER_OUT r5 0x0000000010001000
#_ MEMORY_OUT 10001000 FCFDFEFF