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• 6f851a2083 Merge audit-2026-05-fix/p1-xmodbug-002-write-bulk MechaCat02 2026-05-03 14:30:22 +02:00
• 780e854c2f fix(memory): XMODBUG-002 — write_bulk bumps page_versions for touched pages MechaCat02 2026-05-03 14:30:22 +02:00
• 104078dc29 Merge audit-2026-05-fix/p1-gpubug-006-mmio-ordering MechaCat02 2026-05-03 14:26:09 +02:00
• 8fc1b1dfed fix(gpu): GPUBUG-006 — sync_with_mmio Acquire/Release pair the producer MechaCat02 2026-05-03 14:26:09 +02:00
• fceaa81f46 Merge audit-2026-05-fix/kernel-p0-spinlock-xam: KRNBUG-017 Kf-spinlock MechaCat02 2026-05-03 14:25:00 +02:00
• e7d0fcf2c9 fix(kernel): KRNBUG-017 — real Kf*SpinLock + KeReleaseSpinLockFromRaisedIrql MechaCat02 2026-05-03 14:24:47 +02:00
• 537d789deb Merge audit-2026-05-fix/drawstate-p0-register-addresses: GPUBUG-103/104/105 MechaCat02 2026-05-03 14:22:09 +02:00
• 8723d6826b fix(gpu): GPUBUG-103/104/105 — fix 8 draw-state register addresses + index_size bit MechaCat02 2026-05-03 14:22:04 +02:00
• a07784349d Merge audit-2026-05-fix/shader-p0-operand-modifiers: GPUBUG-100/101/102 MechaCat02 2026-05-03 14:18:51 +02:00
• ec2d955dbd fix(gpu): GPUBUG-102 — apply per-format endian byte-swap to vertex fetch MechaCat02 2026-05-03 14:18:46 +02:00
• c5c6713419 fix(gpu): GPUBUG-100 — apply per-operand swizzle + negate to ALU sources MechaCat02 2026-05-03 14:15:07 +02:00
• 78ea81c12a fix(gpu): GPUBUG-101 — decode src1/2/3_sel temp-vs-constant selector MechaCat02 2026-05-03 14:10:11 +02:00
• 1b74db6fa7 Merge audit-2026-05-fix/renderer-p0-vdswap-pm4: VdSwap PM4 ring path MechaCat02 2026-05-03 14:00:27 +02:00
• 82f3d611e2 fix(gpu,kernel): KRNBUG-Vd-04 / GPUBUG-001 / XMODBUG-013 — VdSwap PM4 ring path MechaCat02 2026-05-03 14:00:23 +02:00
• 0590bffdd9 Merge audit-2026-05-fix/oracle-sylpheed-n50m-n4b: ORACBUG-004 sylpheed_n50m oracle MechaCat02 2026-05-03 13:46:06 +02:00
• 1f416aaa2e test(check): ORACBUG-004 — sylpheed_n50m stable-digest oracle MechaCat02 2026-05-03 13:46:02 +02:00
• 62f673d094 Merge audit-2026-05-fix/swapbug-001-revert-addi-truncation: SWAPBUG-001 revert MechaCat02 2026-05-03 13:38:05 +02:00
• 9ab986ec09 fix(cpu): SWAPBUG-001 — revert addi 32-bit truncation MechaCat02 2026-05-03 13:37:51 +02:00
• caa37fc595 docs(audit): post-P8 end-to-end review findings + acid test result MechaCat02 2026-05-02 14:49:43 +02:00
• 09c6c927bd refactor(cpu): fpscr round_single_toward_zero — collapse duplicate-branch ULP step MechaCat02 2026-05-02 14:45:55 +02:00
• f1166d0f75 fix(cpu): revert PPCBUG-105 — lwa/lwax/lwaux sign-extend per PowerISA MechaCat02 2026-05-02 14:43:47 +02:00
• 9de18a9eec chore(audit): mark P8 PPCBUGs applied; append P8 progress section; AUDIT-FIX-COMPLETE MechaCat02 2026-05-02 14:24:24 +02:00
• 4029041618 Merge branch 'ppc-audit-fix/p8-tests' — Phase 8 test gap closure MechaCat02 2026-05-02 14:23:04 +02:00
• 1f9696ad47 test(cpu): rename vmsum3fp_… to vmaddfp_lane_fma per reviewer nit MechaCat02 2026-05-02 14:22:39 +02:00
• 261480616c test(cpu): PPCBUG-240/277/278/316/321/370/490/517 P8 batch 4 — VMX integer/permute/load-store MechaCat02 2026-05-02 14:16:51 +02:00
• ebfd18a64e test(cpu): PPCBUG-187/208/228/438/439/440 P8 batch 3 — FPU + VMX float MechaCat02 2026-05-02 14:14:10 +02:00
• 2d223eee69 test(cpu): PPCBUG-091/100/109-111/118/127/129/132/146-147/153/163/171 P8 batch 2 — load/store MechaCat02 2026-05-02 14:10:26 +02:00
• 9827b03f1a test(cpu): PPCBUG-055/067/070/081-085/089 P8 batch 1 — branch/CR/SPR/sync MechaCat02 2026-05-02 14:08:54 +02:00
• a7155f4571 chore(audit): mark P7 frozen-snapshot drift cleared (manual regen, no code change) MechaCat02 2026-05-02 14:03:23 +02:00
• 8b9fddc488 chore(audit): mark P6 PPCBUGs applied; append P6 progress section MechaCat02 2026-05-02 13:58:26 +02:00
• 112202c2b9 Merge branch 'ppc-audit-fix/p6-medium' — Phase 6 Other MEDIUM correctness MechaCat02 2026-05-02 13:57:00 +02:00
• 5ece5e315f refactor(cpu): mcrfs uses fpscr::VX_ALL constant per reviewer nit MechaCat02 2026-05-02 13:56:34 +02:00
• 99e7814836 test(cpu): PPCBUG-022 verify mulld_ov INT_MIN*-1 + auto-resolved markers MechaCat02 2026-05-02 13:51:43 +02:00
• 0f2a26c460 fix(cpu): PPCBUG-068/078/080 mcrfs VX recompute + mtmsrd L=1 + mfvscr zero MechaCat02 2026-05-02 13:50:10 +02:00
• 68c0ee55ce fix(cpu): PPCBUG-123/124/125/126/161/162/566 XER TBC + lswi/stswi/lmw MechaCat02 2026-05-02 13:48:03 +02:00
• d96986a10e fix(cpu): PPCBUG-063/064/065 trap PC + sc LEV + twi typed-trap logging MechaCat02 2026-05-02 13:42:50 +02:00
• 9f88e275b8 chore(audit): mark P5 PPCBUGs applied; append P5 progress section MechaCat02 2026-05-02 12:39:46 +02:00
• d39d0bab4d Merge branch 'ppc-audit-fix/p5-fpu' — Phase 5 FPU correctness MechaCat02 2026-05-02 12:38:18 +02:00
• 05f2f72c71 refactor(cpu): vrfin uses stdlib f32::round_ties_even() per reviewer nit MechaCat02 2026-05-02 12:37:54 +02:00
• 6fe2cbf251 fix(cpu): PPCBUG-426/427/433 single-FMA vnmsubfp + vctsxs NaN saturation MechaCat02 2026-05-02 12:31:10 +02:00
• 6ba8f83c30 fix(cpu): PPCBUG-184 fresx pre-quantize input to f32 (canary parity) MechaCat02 2026-05-02 12:29:07 +02:00
• 538fa5ab74 fix(cpu): PPCBUG-435/436/437 VSCR.NJ subnormal flush for VMX float MechaCat02 2026-05-02 12:26:36 +02:00
• 49bf74fae6 fix(cpu): PPCBUG-223/224/225/229/230 FPU XX bit on inexact conversions MechaCat02 2026-05-02 12:22:47 +02:00
• 26b98975c3 fix(cpu): PPCBUG-181/182/183/202/203/205 FMA VXISI + NaN sign preservation MechaCat02 2026-05-02 12:20:02 +02:00
• f6a444b9d1 fix(cpu): PPCBUG-221+227 round_to_i64 + PPCBUG-432 vrfin round-to-even MechaCat02 2026-05-02 12:13:08 +02:00
• 5c45108249 chore(audit): mark P4 PPCBUGs applied; append P4 progress section MechaCat02 2026-05-02 12:09:26 +02:00
• d945aeae83 Merge branch 'ppc-audit-fix/p4-abi-truncation' — Phase 4 ABI truncation MechaCat02 2026-05-02 12:07:53 +02:00
• 49103bb898 fix(cpu): P4 review-fix — subfx/subfcx OE predicate + mulli test rigor MechaCat02 2026-05-02 12:07:32 +02:00
• 16993bb8af fix(cpu): PPCBUG-012-017/020/023-026/032/044 4c+4d latent + CR0 catch-all MechaCat02 2026-05-02 11:55:50 +02:00
• 20a730d69e fix(cpu): PPCBUG-095/096/097/098/105 halfword + lwa load truncation MechaCat02 2026-05-02 11:47:24 +02:00
• 82a9bff934 fix(cpu): PPCBUG-009/010+011/041+042+043 mul/div + srawx truncation MechaCat02 2026-05-02 11:44:34 +02:00
• bf8208e88c fix(cpu): PPCBUG-001/002/003/004/005/007 4b immediate ALU truncation MechaCat02 2026-05-02 11:41:49 +02:00
• 145a7a4019 fix(cpu): PPCBUG-034+035+036+037 extsbx/extshx writeback + CR0 (coupled) MechaCat02 2026-05-02 11:38:22 +02:00
• e18a0a40b8 fix(cpu): PPCBUG-006/008/018/019/028/029/030/031/033 4a active poisoning MechaCat02 2026-05-02 11:35:05 +02:00
• f424132a5b chore(audit): mark P3 PPCBUGs applied; append P3 progress section MechaCat02 2026-05-02 11:28:38 +02:00
• f3ebaba5c9 Merge branch 'ppc-audit-fix/p3-isolated-high' — Phase 3 isolated HIGH bugs MechaCat02 2026-05-02 11:22:54 +02:00
• 7609dcd406 fix(cpu): PPCBUG-700 VMX128 register accessors match canary bitfield layout MechaCat02 2026-05-02 11:22:20 +02:00
• 2be25bdd41 fix(disasm): PPCBUG-641+649 sync/lwsync L-field discrimination MechaCat02 2026-05-02 10:43:24 +02:00
• d4f6ea787b fix(disasm): PPCBUG-640+650 fmt_bc spurious condition suffix on bdnz/bdz MechaCat02 2026-05-02 10:40:45 +02:00
• 3d8e2ced2e fix(cpu): PPCBUG-053+054 32-bit CTR semantics in bcx/bclrx + mtspr CTR MechaCat02 2026-05-02 10:38:18 +02:00
• 52ece4bd86 fix(cpu): PPCBUG-424+425 vmaddfp128/vmaddcfp128 operand swap + va128 field fix MechaCat02 2026-05-02 10:33:24 +02:00
• cedee3c385 fix(cpu): PPCBUG-510 stvewx128 writes 16 bytes instead of 4 MechaCat02 2026-05-02 10:05:37 +02:00
• a8c918cf9e chore(audit): mark P2 PPCBUGs applied; append P2 progress section MechaCat02 2026-05-01 22:11:28 +02:00
• 52b05b127f merge(cpu): Phase 2 decoder sweep — PPCBUG-040,046,275,276,315,360,361,362,363,369,420,421,422,423,560,561,562,563,564,565,600 MechaCat02 2026-05-01 22:09:38 +02:00
• 6b9de17925 fix(cpu): PPCBUG-363 PPCBUG-369 vpkd3d128 post-pack permutation MechaCat02 2026-05-01 22:06:00 +02:00
• 64e8ecbfd0 fix(cpu): PPCBUG-361 PPCBUG-565 fix vsldoi128 SH field extraction MechaCat02 2026-05-01 21:29:12 +02:00
• 197d76c44e fix(cpu): PPCBUG-315 PPCBUG-563 fix vrlimi128 z and IMM field extraction MechaCat02 2026-05-01 21:26:26 +02:00
• d51b9346df fix(cpu): PPCBUG-275 276 420 421 422 423 562 600 fix vcmp Rc bit + decode dot forms MechaCat02 2026-05-01 21:15:06 +02:00
• 75544fa9db fix(cpu): PPCBUG-046 PPCBUG-561 add mb_md() accessor; fix all 6 rld* mb fields MechaCat02 2026-05-01 21:01:03 +02:00
• 147daa0721 fix(cpu): PPCBUG-040 PPCBUG-560 fix sh64() bit order and rldicl test helper MechaCat02 2026-05-01 20:54:40 +02:00
• ca5b90b700 fix(cpu): P1 atomicity sweep — invalidate_for_write at all store sites MechaCat02 2026-05-01 20:47:49 +02:00
• c9f194dda1 fix(cpu): review fixes — stswi/stswx two-line guard, dcbz/dcbz128 invalidate MechaCat02 2026-05-01 20:47:32 +02:00
• d75c4edf67 docs(cpu): PPCBUG-108 document legacy reservation path's strict-lockstep requirement MechaCat02 2026-05-01 17:55:13 +02:00
• a107ac9ae7 fix(cpu): PPCBUG-151 add reservation_width discriminator to stwcx./stdcx. MechaCat02 2026-05-01 17:44:48 +02:00
• d4e227eeab fix(cpu): PPCBUG-511 PPCBUG-512 PPCBUG-513 PPCBUG-514 add invalidate_for_write to VMX stores MechaCat02 2026-05-01 17:36:17 +02:00
• af54eb28bd fix(cpu): PPCBUG-160 PPCBUG-167 add invalidate_for_write to multiple/string + FP stores MechaCat02 2026-05-01 17:24:46 +02:00
• 24d347436a fix(cpu): PPCBUG-130 PPCBUG-150 add invalidate_for_write to byte/halfword/doubleword stores MechaCat02 2026-05-01 17:13:31 +02:00
• 4538fa9e70 fix(cpu): PPCBUG-107 PPCBUG-140-144 add invalidate_for_write to word stores MechaCat02 2026-05-01 16:57:05 +02:00
• bae9305982 xenia-app: observability subsystem, --parallel runtime, stress harness MechaCat02 2026-05-01 16:30:26 +02:00
• b1285ba560 xenia-hid + xenia-debugger: gamepad serializer; debugger fast-skip hook MechaCat02 2026-05-01 16:30:03 +02:00
• 79eb52c378 xenia-gpu: end-to-end Xenos pipeline (PM4, ucode, EDRAM, resolve) MechaCat02 2026-05-01 16:29:38 +02:00
• 5f0d6487ea xenia-kernel: HLE expansion, scheduler integration, audit + UI bridge MechaCat02 2026-05-01 16:29:00 +02:00
• f1fadb5398 xenia-vfs/xex: cache full disc tree; instrument XEX load MechaCat02 2026-05-01 16:28:32 +02:00
• 45e15d7885 xenia-analysis: unify disasm via xenia-cpu, split ingest/analyze, add sinks MechaCat02 2026-05-01 16:28:06 +02:00
• c36cca14f9 xenia-cpu: VMX128, FPSCR, decoder split, scheduler, decode/block caches MechaCat02 2026-05-01 16:27:43 +02:00
• e9b2b57a44 xenia-memory: interior-mutable writes, page versioning, fenced ops MechaCat02 2026-05-01 16:27:13 +02:00
• e2b8860e10 Add xenia-ui crate; switch analysis store to DuckDB MechaCat02 2026-05-01 16:26:48 +02:00
• f166d061be Ignore audit reports, run logs, and per-crate target/ dirs MechaCat02 2026-05-01 16:26:10 +02:00
• c694bb3f43 Initial commit: xenia-rs workspace for Xbox 360 RE MechaCat02 2026-04-16 23:11:49 +02:00