Files
xenia-rs/migration/project-root/ppc-manual/control/mtcrf.md
MechaCat02 e6d43a23ac chore: add migration/ bundle for cross-machine setup
Bundles state that lives OUTSIDE the xenia-rs repo so a fresh clone on
another machine can be brought up to identical configuration via
migration/setup.sh:

  - claude-memory/             ~/.claude/projects/-home-fabi-RE-Project-Sylpheed/memory/
                               (103 files, 1.1 MB - MEMORY.md + every
                                project_xenia_rs_*.md from audits
                                addis_signext through audit-058)
  - project-root/dot-claude/   <project-root>/.claude/settings.json
                               (Stop hook + permissions)
  - project-root/ppc-manual/   <project-root>/ppc-manual/
                               (PowerPC reference docs, 397 files, 3.7 MB)
  - project-root/run-canary.sh <project-root>/run-canary.sh
  - README.md                  Human-readable setup checklist
  - setup.sh                   Idempotent installer (also reclones
                               xenia-canary at pinned HEAD 6de80dffe)
  - MANIFEST.md                Per-file mapping + per-file-not-bundled
                               restoration recipe

Excluded from bundle (not shippable via git):
  - Sylpheed ISO (7.8 GB; copyright; manual copy required)
  - sylpheed.db (395 MB; regenerable from XEX via analysis tooling)
  - target/ build artifacts (rebuild on target)
  - audit-runs probe firehoses (.log/.stdout/.stderr ~11 GB; rerun if needed)
  - audit-runs memory dumps (.bin ~4.5 GB; rerun audit-026/027/029 if needed)
  - xenia-canary checkout (setup.sh reclones from
    git.mc02.dev/fabi/Xenia-Canary.git at HEAD 6de80dffe)

Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
2026-05-10 21:38:38 +02:00

5.7 KiB
Raw Blame History

mtcrf — Move to Condition Register Fields

Category: Control / CR / SPR · Form: XFX · Opcode: 0x7c000120

Assembler Mnemonics

Mnemonic XML entry Flags Description
mtcrf mtcrf Move to Condition Register Fields

Syntax

mtcrf [CRM], [RS]

Encoding

mtcrf — form XFX

  • Opcode word: 0x7c000120
  • Primary opcode (bits 05): 31
  • Extended opcode: 144
  • Synchronising: no
Bits Field Meaning
05 OPCD primary opcode (31)
610 RT destination / source GPR
1120 spr/tbr/FXM SPR/TBR number (byte-swapped halves) or CR field mask
2130 XO extended opcode
31 reserved

Operands

Field Role Description
RS mtcrf: read Source GPR (alias for RD in some stores).
CRM mtcrf: write 8-bit CR field mask used by mtcrf — one bit per CR field.

Register Effects

mtcrf

  • Reads (always): RS
  • Reads (conditional): none
  • Writes (always): CRM
  • Writes (conditional): none

Status-Register Effects

No condition-register or status-register effects.

Operation (pseudocode)

for i in 0..7:
    if CRM[i] then CR[i] <- (RS)[32+i*4 : 35+i*4]

C Translation Example

/* C translation: the xenia-rs interpreter arm below in           */
/* Implementation References is the authoritative semantic        */
/* snapshot. Translate it line-by-line:                            */
/*   - ctx.gpr[N]  -> r[N]       (or f[]/v[] for FPRs/VRs)        */
/*   - mem.read_u*/write_u* -> mem_read_u*_be / mem_write_u*_be   */
/*   - ctx.update_cr_signed(fld, v) -> update_cr_signed(fld, v)   */
/*   - ctx.xer_ca / xer_ov / xer_so -> xer.CA / xer.OV / xer.SO   */
/* The Register Effects and Status-Register Effects tables above  */
/* enumerate every side effect a faithful translation must emit.  */

Implementation References

mtcrf

xenia-rs interpreter body (frozen snapshot)
        PpcOpcode::mtcrf => {
            let crm = instr.crm();
            let val = ctx.gpr[instr.rs()] as u32;
            let old = ctx.cr();
            let mut new = old;
            for i in 0..8u32 {
                if crm & (1 << (7 - i)) != 0 {
                    let mask = 0xF << (28 - i * 4);
                    new = (new & !mask) | (val & mask);
                }
            }
            ctx.set_cr(new);
            ctx.pc += 4;
        }

Special Cases & Edge Conditions

  • CRM is an 8-bit field-mask, MSB-first. Each bit of CRM corresponds to one CR field: CRM[0] (mask bit 0x80) selects CR0, CRM[1] (0x40) selects CR1, …, CRM[7] (0x01) selects CR7. Each set mask bit causes the corresponding 4-bit slice of RS[32:63] to overwrite that CR field; clear mask bits leave the field untouched.
  • Slice positions inside RS. Big-endian: bits 32..35 of RS map to CR0, bits 36..39 to CR1, …, bits 60..63 to CR7. The high 32 bits of RS are ignored.
  • mtcr RS simplified mnemonic. When CRM = 0xFF, all eight CR fields are written; assemblers fold this into mtcr RS. This is the dominant form (function epilogue restoring the saved CR).
  • mtocrf variant. PowerISA defines mtocrf as the single-field variant — encoded with the high bit of FXM set and exactly one CRM bit set. xenia-rs treats both as the same opcode and processes whatever CRM mask is present, so mtocrf works correctly without special handling.
  • Use case in ABI. Save/restore non-volatile CR fields (CR2, CR3, CR4 on the Xbox 360 ABI). The standard restore is lwz r12, 8(r1); mtcrf 0x38, r120x38 = bits for CR2|CR3|CR4 — preserving the volatile fields the callee may have already updated.
  • No CR0 / XER side effects. mtcrf does not record into CR0; XER is untouched.
  • xenia exact match. xenia-rs decomposes the CR into a u32, applies a per-field mask, and reassembles via set_cr. The 8-bit CRM walk matches the spec exactly.
  • Not synchronising. Reorderable.
  • mfcr — read the entire CR into a GPR.
  • mcrf — copy one CR field to another (no GPR involved).
  • mcrxr, mcrfs — narrower CR-field moves from XER / FPSCR.
  • crand, cror, … — bit-level CR manipulation.

Simplified Mnemonics

Simplified Expansion Notes
mtcr RS mtcrf 0xFF, RS write all eight CR fields from low half of RS

mtocrf RS, FXM is a related encoding handled by the same xenia-rs slot.

IBM Reference