e6d43a23ac
Bundles state that lives OUTSIDE the xenia-rs repo so a fresh clone on
another machine can be brought up to identical configuration via
migration/setup.sh:
- claude-memory/ ~/.claude/projects/-home-fabi-RE-Project-Sylpheed/memory/
(103 files, 1.1 MB - MEMORY.md + every
project_xenia_rs_*.md from audits
addis_signext through audit-058)
- project-root/dot-claude/ <project-root>/.claude/settings.json
(Stop hook + permissions)
- project-root/ppc-manual/ <project-root>/ppc-manual/
(PowerPC reference docs, 397 files, 3.7 MB)
- project-root/run-canary.sh <project-root>/run-canary.sh
- README.md Human-readable setup checklist
- setup.sh Idempotent installer (also reclones
xenia-canary at pinned HEAD 6de80dffe)
- MANIFEST.md Per-file mapping + per-file-not-bundled
restoration recipe
Excluded from bundle (not shippable via git):
- Sylpheed ISO (7.8 GB; copyright; manual copy required)
- sylpheed.db (395 MB; regenerable from XEX via analysis tooling)
- target/ build artifacts (rebuild on target)
- audit-runs probe firehoses (.log/.stdout/.stderr ~11 GB; rerun if needed)
- audit-runs memory dumps (.bin ~4.5 GB; rerun audit-026/027/029 if needed)
- xenia-canary checkout (setup.sh reclones from
git.mc02.dev/fabi/Xenia-Canary.git at HEAD 6de80dffe)
Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
39 lines
2.0 KiB
Markdown
39 lines
2.0 KiB
Markdown
# Form `VX128_1` — VX128_1 — VMX128 vector load/store
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## Bit Layout
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| Bits | Field | Meaning |
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| --- | --- | --- |
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| 0–5 | `OPCD` | primary opcode (4) |
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| 6–10 | `VD128l` | destination low 5 bits |
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| 11–15 | `RA` | address register |
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| 16–20 | `RB` | offset register |
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| 21–27 | `XO` | extended opcode |
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| 28–29 | `VD128h` | destination high 2 bits |
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| 30–31 | `—` | reserved |
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## Instructions Using This Form
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<!-- GENERATED: BEGIN -->
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| Mnemonic | Opcode | Group | Description |
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| --- | --- | --- | --- |
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| [`lvsl128`](../vmx128/lvsl.md) | `0x10000003` | vmx | Load Vector for Shift Left Indexed 128 |
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| [`lvsr128`](../vmx128/lvsr.md) | `0x10000043` | vmx | Load Vector for Shift Right Indexed 128 |
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| [`lvewx128`](../memory/lvewx.md) | `0x10000083` | memory | Load Vector Element Word Indexed 128 |
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| [`lvx128`](../memory/lvx.md) | `0x100000c3` | memory | Load Vector Indexed 128 |
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| [`stvewx128`](../memory/stvewx.md) | `0x10000183` | memory | Store Vector Element Word Indexed 128 |
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| [`stvx128`](../memory/stvx.md) | `0x100001c3` | memory | Store Vector Indexed 128 |
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| [`lvxl128`](../memory/lvxl.md) | `0x100002c3` | memory | Load Vector Indexed LRU 128 |
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| [`stvxl128`](../memory/stvxl.md) | `0x100003c3` | memory | Store Vector Indexed LRU 128 |
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| [`lvlx128`](../memory/lvlx.md) | `0x10000403` | memory | Load Vector Left Indexed 128 |
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| [`lvrx128`](../memory/lvrx.md) | `0x10000443` | memory | Load Vector Right Indexed 128 |
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| [`stvlx128`](../memory/stvlx.md) | `0x10000503` | memory | Store Vector Left Indexed 128 |
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| [`stvrx128`](../memory/stvrx.md) | `0x10000543` | memory | Store Vector Right Indexed 128 |
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| [`lvlxl128`](../memory/lvlxl.md) | `0x10000603` | memory | Load Vector Left Indexed LRU 128 |
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| [`lvrxl128`](../memory/lvrxl.md) | `0x10000643` | memory | Load Vector Right Indexed LRU 128 |
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| [`stvlxl128`](../memory/stvlxl.md) | `0x10000703` | memory | Store Vector Left Indexed LRU 128 |
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| [`stvrxl128`](../memory/stvrxl.md) | `0x10000743` | memory | Store Vector Right Indexed LRU 128 |
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<!-- GENERATED: END -->
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