Sylpheed/tools/ppc-manual/control/crandc.md

crandc — Condition Register AND with Complement

Category: Control / CR / SPR · Form: XL · Opcode: 0x4c000102

Assembler Mnemonics

Mnemonic	XML entry	Flags	Description
crandc	crandc	—	Condition Register AND with Complement

Syntax

crandc [CRBD], [CRBA], [CRBB]

Encoding

crandc — form XL

• Opcode word: 0x4c000102
• Primary opcode (bits 0–5): 19
• Extended opcode: 129
• Synchronising: no

Bits	Field	Meaning
0–5	OPCD	primary opcode (19)
6–10	BT/BO	target / branch options
11–15	BA/BI	source A / CR bit to test
16–20	BB	source B
21–30	XO	extended opcode (10 bits)
31	LK	link flag

Operands

Field	Role	Description
CRBA	crandc: read	CR source bit A (0–31).
CRBB	crandc: read	CR source bit B (0–31).
CRBD	crandc: write	CR destination bit (0–31).

Register Effects

crandc

• Reads (always): CRBA, CRBB
• Reads (conditional): none
• Writes (always): CRBD
• Writes (conditional): none

Status-Register Effects

No condition-register or status-register effects.

Operation (pseudocode)

; No hand-written pseudocode for this instruction yet.
; The authoritative semantics are the Canary emitter snapshot under
; Implementation References; about half of Canary's emitters open
; with the PPC-style definition as a comment (`RD <- (RA) + (RB)`).
; Every side effect is also enumerated in the Register Effects and
; Status-Register Effects tables above.

C Translation Example

/* No hand-written C yet. Translate the Canary emitter snapshot   */
/* under Implementation References; its HIR maps directly:        */
/*   f.LoadGPR(n) / f.StoreGPR(n, v)  -> r[n] / r[n] = v          */
/*   f.LoadFPR / StoreFPR, f.LoadVR / StoreVR -> f[n], v[n]        */
/*   f.Load(ea, T), f.Store(ea, v) -> raw read / write; emitters   */
/*     wrap them in f.ByteSwap for the big-endian guest value      */
/*   f.UpdateCR(n, v)  -> CR field n from v's LOW 32 BITS vs 0     */
/*   f.LoadCA / f.StoreCA -> xer.CA;  f.StoreSAT -> vscr.SAT       */
/*   i.XO.RA, i.D.DS, ... -> the bit-fields listed under Operands  */
/* The Register Effects and Status-Register Effects tables above  */
/* enumerate every side effect a faithful translation must emit.  */

Implementation References

crandc

• Canary XML: tools/ppc-instructions.xml — search for mnem="crandc"
• Canary emitter: src/xenia/cpu/ppc/ppc_emit_control.cc:361
• Sylpheed opcode: crates/sylpheed-ppc/src/opcode.rs:36
• Sylpheed decoder: crates/sylpheed-ppc/src/decoder.rs:828

Canary emitter (frozen snapshot @ f21ebd49e9)

int InstrEmit_crandc(PPCHIRBuilder& f, const InstrData& i) {
  // CR[bt] <- CR[ba] & ¬CR[bb]   bt=bo, ba=bi, bb=bb
  Value* ba = f.LoadCRField(i.XL.BI >> 2, i.XL.BI & 3);
  Value* bb = f.LoadCRField(i.XL.BB >> 2, i.XL.BB & 3);
  Value* bt = f.And(ba, f.And(f.Not(bb), f.LoadConstantInt8(0x01)));
  f.StoreCRField(i.XL.BO >> 2, i.XL.BO & 3, bt);
  return 0;
}

Special Cases & Edge Conditions

• Operation. CR[CRBD] ← CR[CRBA] AND ¬CR[CRBB] — a one-instruction "A and not B" that would otherwise need a complement-then-AND sequence. All other CR bits are preserved.
• Bit-level operands. CRBD, CRBA, CRBB are 5-bit indices into the 32 CR bits (0=CR0.LT, 1=CR0.GT, 2=CR0.EQ, 3=CR0.SO, 4=CR1.LT, …, 31=CR7.SO). They need not lie in the same CR field.
• Identity / corner cases. crandc BT, BA, BA always yields 0 (a clear-bit idiom, equivalent to but slower than crxor BT, BT, BT). crandc BT, BA, BB with BB always 0 reduces to crmove BT, BA.
• Use case. Synthesises "branch if A and not B" predicates without a dedicated cmp of B. Example: branch only if cr0.EQ and not cr1.SO — crandc 2, 2, 7 then beq on cr0.
• No Rc / OE. Pure CR-bit dataflow; doesn't update CR0 or XER.
• Not synchronising. Reorderable.
• Canary status. Canary's InstrEmit_crandc emits a host AND of A and bitwise-NOT of B.

Related Instructions

• crand, cror, crorc — closest siblings.
• crnand, crnor, crxor, creqv — full set of CR Boolean ops.
• mcrf — copy entire CR field; complementary "broad" CR move.
• bcx — typical consumer of synthesised CR bits.

crandc has no dedicated simplified mnemonic. See crand for the standard crmove / crset / crclr family.

IBM Reference

• AIX 7.3 — crandc (Condition Register AND with Complement)
• AIX 7.3 — Condition register simplified mnemonics