Files
MechaCat02 10dc260f0c chore(tools): adopt the PPC manual and a canary launcher that works anywhere
CONSOLIDATION.md Phase 6. Both lived untracked in the project root -- on one
disk, backed up by nothing.

  tools/ppc-manual/   393 files, 3.7 MB. 455 instructions, 350 family pages,
                      598 mnemonics resolvable through index.json, plus the
                      generator that produced them.
  tools/run-canary.sh the oracle launcher.

🔴 THE LAUNCHER WAS BROKEN IN TWO WAYS AND IS REWRITTEN, not copied:

  * it pointed at `xenia-rs/sylpheed.iso`, a SYMLINK. Wine cannot resolve one
    and says "path invalid", which reads as a corrupt image rather than a path
    problem -- it has cost a session before. It now points at the real file and
    warns if handed a symlink.
  * it hardcoded one machine's absolute paths, and named `xenia-rs`, which this
    consolidation retires. Now derived from the script's own location, with
    SYLPH_CANARY_BIN / SYLPH_ISO overrides and a check that each exists.

The standing constraints are in its header where someone will read them: one
emulator at a time, Canary runs MUTED, and never judge a crash or a hang from
a Bash-launched run -- a SIGKILL that looked like the binary was the editor's
process supervisor.

⚠️ The manual's GENERATOR reads the xenia-rs source tree, which is going away.
Its decoder now lives here as crates/sylpheed-ppc, so the generator must be
repointed before it is run again. Recorded in the README rather than left for
someone to discover; the manual's content is checked in and regenerates from
nothing implicitly.

Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
2026-09-13 21:18:00 +02:00

2.3 KiB
Raw Permalink Blame History

Form A — A — Arithmetic (three-source FPU)

Bit Layout

Bits Field Meaning
05 OPCD primary opcode (59 or 63)
610 FRT destination FPR
1115 FRA source A FPR
1620 FRB source B FPR
2125 FRC source C FPR (multiplier for madd-style ops)
2630 XO extended opcode (5 bits)
31 Rc record-form flag (updates CR1)

Instructions Using This Form

Mnemonic Opcode Group Description
fdivsx 0xec000024 fpu Floating Divide Single
fsubsx 0xec000028 fpu Floating Subtract Single
faddsx 0xec00002a fpu Floating Add Single
fsqrtsx 0xec00002c fpu Floating Square Root Single
fresx 0xec000030 fpu Floating Reciprocal Estimate Single
fmulsx 0xec000032 fpu Floating Multiply Single
fmsubsx 0xec000038 fpu Floating Multiply-Subtract Single
fmaddsx 0xec00003a fpu Floating Multiply-Add Single
fnmsubsx 0xec00003c fpu Floating Negative Multiply-Subtract Single
fnmaddsx 0xec00003e fpu Floating Negative Multiply-Add Single
fdivx 0xfc000024 fpu Floating Divide
fsubx 0xfc000028 fpu Floating Subtract
faddx 0xfc00002a fpu Floating Add
fsqrtx 0xfc00002c fpu Floating Square Root
fselx 0xfc00002e fpu Floating Select
fmulx 0xfc000032 fpu Floating Multiply
frsqrtex 0xfc000034 fpu Floating Reciprocal Square Root Estimate
fmsubx 0xfc000038 fpu Floating Multiply-Subtract
fmaddx 0xfc00003a fpu Floating Multiply-Add
fnmsubx 0xfc00003c fpu Floating Negative Multiply-Subtract
fnmaddx 0xfc00003e fpu Floating Negative Multiply-Add