Pack(1) causes unaligned pointer errors on ARM64 with Apple's linker.
These are static read-only tables where the ~9KB size savings from
packing is negligible. Removing the pack may also marginally improve
access speed on x86 by avoiding unaligned loads.
Based entirely off existing xbyak x86 implementation and available
tests. Still needs a lot of optimization and testing on non-Windows
platforms.
So far passes all tests and boots at least some games on Windows.
On posix run tests in parallel using a thread pool with fork-per-test
isolation (ported from edge).
On all platforms add progress output showing suite name and test count,
as well as elapsed time in the summary.
- add SIGTRAP handling
- remove per-test dots and print per suite instead
- refactor test loop from collecting all tests to iterating suites
- fix logging up output
On Linux, these instructions appear to use A format (FRA, FRB, FRT)
instead of the standard X format (RA, RB, RT). Need to verify if this
is needed on Windows or is Linux specific.
Implement SNaN detection and FPSCR exception tracking so that Rc=1 FPU
instructions (fadds., fmadds., etc.) correctly update CR1 with FPSCR
exception summary bits (FX, FEX, VX, OX). Previously these were
hardcoded to zero. Enable ~2k tests that were previously disabled.
Add 3-bit VC field to VX128_2 format structure to support
instructions like vperm128 that use 4 distinct vector operands.
The VC field occupies bits 6-8 of the instruction encoding.
mcrfs: Implement Move CR from FPSCR instruction
Copies a 4-bit FPSCR field to CR and clears the FPSCR exception bits.
mffsx: Fix Rc bit handling
Properly update CR1 from FPSCR when Rc=1 instead of returning error.
Previously treated Rc=1 as unimplemented.
fcfidx: Fix Rc field access
Use i.X.Rc instead of i.A.Rc for correct instruction format.
fcfid uses X format, not A format.
Implement mcrxr (Move to Condition Register from XER).
Copies XER condition bits (SO, OV, CA) to a CR field and
clears those bits in XER. This was previously unimplemented.
Correct mfvscr and mtvscr to use VX format instead of VX128_1.
These instructions operate on the standard Altivec VSCR register,
not VMX128 extended registers. The previous VX128_1 format was
incorrectly accessing the RB field instead of VD/VB.
- Added some fixes introduced by RodoMa92 in PR198
- Lack of AVX2 extension (should be done differently in the future)
- Disable deprecated-volatile warning
- Added missing override in posix EventInfo, ImGui notification class and XContent class
- Removed not used XAudio2.h include in XMP
- Fixed missing switch-case in XObject
- Added fugly template in native_list.h
- Fixed multiple smaller issues
